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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-02-19 03:38:23 (GMT) |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2010-02-19 03:38:23 (GMT) |
commit | 87d31345c0a90ccdf185feed9923ed14764f45dc (patch) | |
tree | 2816764e59f93379e0e3843fa0c417aafe02c503 /arch/powerpc/include/asm | |
parent | e98efaf303ccbff11522a054d155593d7f2bb41f (diff) | |
parent | d24720a45ad2928f687c6371482cdfba19b74fc5 (diff) | |
download | linux-fsl-qoriq-87d31345c0a90ccdf185feed9923ed14764f45dc.tar.xz |
Merge commit 'gcl/next' into next
Diffstat (limited to 'arch/powerpc/include/asm')
-rw-r--r-- | arch/powerpc/include/asm/mpc5121.h | 24 | ||||
-rw-r--r-- | arch/powerpc/include/asm/mpc52xx_psc.h | 4 |
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h new file mode 100644 index 0000000..e6a30bb --- /dev/null +++ b/arch/powerpc/include/asm/mpc5121.h @@ -0,0 +1,24 @@ +/* + * MPC5121 Prototypes and definitions + * + * This file is licensed under the terms of the GNU General Public + * License version 2. + */ + +#ifndef __ASM_POWERPC_MPC5121_H__ +#define __ASM_POWERPC_MPC5121_H__ + +/* MPC512x Reset module registers */ +struct mpc512x_reset_module { + u32 rcwlr; /* Reset Configuration Word Low Register */ + u32 rcwhr; /* Reset Configuration Word High Register */ + u32 reserved1; + u32 reserved2; + u32 rsr; /* Reset Status Register */ + u32 rmr; /* Reset Mode Register */ + u32 rpr; /* Reset Protection Register */ + u32 rcr; /* Reset Control Register */ + u32 rcer; /* Reset Control Enable Register */ +}; + +#endif /* __ASM_POWERPC_MPC5121_H__ */ diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h index fb84120..42561f4 100644 --- a/arch/powerpc/include/asm/mpc52xx_psc.h +++ b/arch/powerpc/include/asm/mpc52xx_psc.h @@ -25,7 +25,11 @@ #include <asm/types.h> /* Max number of PSCs */ +#ifdef CONFIG_PPC_MPC512x +#define MPC52xx_PSC_MAXNUM 12 +#else #define MPC52xx_PSC_MAXNUM 6 +#endif /* Programmable Serial Controller (PSC) status register bits */ #define MPC52xx_PSC_SR_UNEX_RX 0x0001 |