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authorKumar Gala <galak@kernel.crashing.org>2007-09-13 06:44:20 (GMT)
committerKumar Gala <galak@kernel.crashing.org>2007-09-14 13:53:30 (GMT)
commit5e14d21e3f28a4181dacff0336040e30942f4921 (patch)
treeebaa8217d5af80e15116960641a0bf87a8b5d717 /arch/powerpc/kernel/ptrace.c
parentd8f1324a5063c833862328ceafabc53ac3cc4f71 (diff)
downloadlinux-fsl-qoriq-5e14d21e3f28a4181dacff0336040e30942f4921.tar.xz
[POWERPC] Add cpu feature for SPE handling
Make it so that SPE support can be determined at runtime. This is similiar to how we handle AltiVec. This allows us to have SPE support built in and work on processors with and without SPE. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/ptrace.c')
-rw-r--r--arch/powerpc/kernel/ptrace.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 8a177bd..fb8866e 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -576,8 +576,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
#ifdef CONFIG_SPE
case PTRACE_GETEVRREGS:
/* Get the child spe register state. */
- if (child->thread.regs->msr & MSR_SPE)
- giveup_spe(child);
+ flush_spe_to_thread(child);
ret = get_evrregs((unsigned long __user *)data, child);
break;
@@ -585,8 +584,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
/* Set the child spe register state. */
/* this is to clear the MSR_SPE bit to force a reload
* of register state from memory */
- if (child->thread.regs->msr & MSR_SPE)
- giveup_spe(child);
+ flush_spe_to_thread(child);
ret = set_evrregs(child, (unsigned long __user *)data);
break;
#endif