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| author | Michael Neuling <mikey@neuling.org> | 2012-06-25 13:33:18 (GMT) |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-07-10 09:18:16 (GMT) |
| commit | e55174e911637f0093bc9dac137b568e8a4a1f29 (patch) | |
| tree | 1dacab9f4c9a77ac1bda836f9065bbe4ab7b3074 /arch/powerpc/kernel | |
| parent | 03a22bfcfdfe88db8b4d2d9ee65476793038364f (diff) | |
| download | linux-fsl-qoriq-e55174e911637f0093bc9dac137b568e8a4a1f29.tar.xz | |
powerpc: Fixes for instructions not using correct register naming
These macros are using integers where they could be using logical
names since they take registers.
We are going to enforce this soon, so fix these up now.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
| -rw-r--r-- | arch/powerpc/kernel/exceptions-64e.S | 8 | ||||
| -rw-r--r-- | arch/powerpc/kernel/misc_64.S | 4 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S index 7215cc2..bc36734 100644 --- a/arch/powerpc/kernel/exceptions-64e.S +++ b/arch/powerpc/kernel/exceptions-64e.S @@ -903,7 +903,7 @@ skpinv: addi r6,r6,1 /* Increment */ bne 1b /* If not, repeat */ /* Invalidate all TLBs */ - PPC_TLBILX_ALL(0,0) + PPC_TLBILX_ALL(R0,R0) sync isync @@ -961,7 +961,7 @@ skpinv: addi r6,r6,1 /* Increment */ tlbwe /* Invalidate TLB1 */ - PPC_TLBILX_ALL(0,0) + PPC_TLBILX_ALL(R0,R0) sync isync @@ -1020,7 +1020,7 @@ skpinv: addi r6,r6,1 /* Increment */ tlbwe /* Invalidate TLB1 */ - PPC_TLBILX_ALL(0,0) + PPC_TLBILX_ALL(R0,R0) sync isync @@ -1138,7 +1138,7 @@ a2_tlbinit_after_iprot_flush: tlbwe #endif /* CONFIG_PPC_EARLY_DEBUG_WSP */ - PPC_TLBILX(0,0,0) + PPC_TLBILX(0,R0,R0) sync isync diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index f52f9b9..565b786 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -309,7 +309,7 @@ _GLOBAL(real_205_readb) mtmsrd r0 sync isync - LBZCIX(R3,0,R3) + LBZCIX(R3,R0,R3) isync mtmsrd r7 sync @@ -324,7 +324,7 @@ _GLOBAL(real_205_writeb) mtmsrd r0 sync isync - STBCIX(R3,0,R4) + STBCIX(R3,R0,R4) isync mtmsrd r7 sync |