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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2007-10-04 05:40:43 (GMT)
committerPaul Mackerras <paulus@samba.org>2007-10-09 11:01:56 (GMT)
commitd767efe30f42c9e827ac1f452762f55b2d8fbdb3 (patch)
tree3ab8e4d1c166f17e5f0bd493c1122d09594c867a /arch/powerpc/platforms/cell/setup.c
parenteef686a0095430bdd6c1942f86dd2b543e66679f (diff)
downloadlinux-fsl-qoriq-d767efe30f42c9e827ac1f452762f55b2d8fbdb3.tar.xz
[POWERPC] cell: Add Cell memory controller register defs and expose it
This adds definitions for the Cell memory controller registers (at least some of them) for use by the EDAC driver for ECC error reporting. It also expose the said MIC as a platform device that can be used by the EDAC driver to match on. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/cell/setup.c')
-rw-r--r--arch/powerpc/platforms/cell/setup.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index b8d95ad..5343e38 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -83,12 +83,22 @@ static void cell_progress(char *s, unsigned short hex)
static int __init cell_publish_devices(void)
{
+ int node;
+
if (!machine_is(cell))
return 0;
/* Publish OF platform devices for southbridge IOs */
of_platform_bus_probe(NULL, NULL, NULL);
+ /* There is no device for the MIC memory controller, thus we create
+ * a platform device for it to attach the EDAC driver to.
+ */
+ for_each_online_node(node) {
+ if (cbe_get_cpu_mic_tm_regs(cbe_node_to_cpu(node)) == NULL)
+ continue;
+ platform_device_register_simple("cbe-mic", node, NULL, 0);
+ }
return 0;
}
device_initcall(cell_publish_devices);