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authorZhao Chenhui <chenhui.zhao@freescale.com>2014-04-24 06:47:59 (GMT)
committerJose Rivera <German.Rivera@freescale.com>2014-04-29 00:17:33 (GMT)
commit22642f20535811b5bf40a3f3323fd4e5719a162d (patch)
tree30831aade27ebd5cf5deca16e4437f6c31833fa4 /arch/powerpc/platforms
parentce8df95ce58feeee6fe2af8181680b3a9a5aea58 (diff)
downloadlinux-fsl-qoriq-22642f20535811b5bf40a3f3323fd4e5719a162d.tar.xz
powerpc/deepsleep: set MPIC to the mixed mode to avoid deep sleep issue
The deep sleep does not wake consistently on T1040 and T1042 with the external proxy facility mode of MPIC (MPIC_ENABLE_COREINT), so use the mixed mode of MPIC. Set mpic_get_irq() to ppc_md.get_irq to enable the mixed mode. Change-Id: I5eee6a15c845fb994c39d74a4e8140a610caf5f9 Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/11438 Reviewed-by: Yang Li <LeoLi@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/85xx/corenet_generic.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 45a61bb..018ed5d 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -31,6 +31,7 @@
#include <linux/of_platform.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
+#include <asm/mpc85xx.h>
#include "smp.h"
#include "mpc85xx.h"
@@ -39,12 +40,23 @@
void __init corenet_gen_pic_init(void)
{
struct mpic *mpic;
+ u32 svr = mfspr(SPRN_SVR);
unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
MPIC_NO_RESET;
#ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
#endif
+ /*
+ * The deep sleep does not wake consistently on T1040 and T1042 with
+ * the external proxy facility mode of MPIC (MPIC_ENABLE_COREINT),
+ * so use the mixed mode of MPIC. Set mpic_get_irq to ppc_md.get_irq
+ * to enable the mixed mode of MPIC.
+ */
+ if ((SVR_SOC_VER(svr) == SVR_T1040) ||
+ (SVR_SOC_VER(svr) == SVR_T1042)) {
+ ppc_md.get_irq = mpic_get_irq;
+ }
if (ppc_md.get_irq == mpic_get_coreint_irq)
flags |= MPIC_ENABLE_COREINT;