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| author | Zhao Qiang <B45475@freescale.com> | 2014-03-24 06:18:48 (GMT) |
|---|---|---|
| committer | Jose Rivera <German.Rivera@freescale.com> | 2014-03-24 16:17:49 (GMT) |
| commit | 279b744be4bdd8d613b0f1347597114d823daf0f (patch) | |
| tree | 0b2344eecf18ca42b5f7721c9e4727287050b6ee /arch/powerpc/platforms | |
| parent | 88413d5a74109caeed70a4a101dae061444f8546 (diff) | |
| download | linux-fsl-qoriq-279b744be4bdd8d613b0f1347597114d823daf0f.tar.xz | |
Corenet: Add QE platform support for Corenet
There is QE on platform T104x, add support.
Call funcs qe_ic_init and qe_init if CONFIG_QUICC_ENGINE is defined.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I7d33f4237aabadfc63d4e55d96ebdb64fb396736
Reviewed-on: http://git.am.freescale.net:8181/10099
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Diffstat (limited to 'arch/powerpc/platforms')
| -rw-r--r-- | arch/powerpc/platforms/85xx/corenet_generic.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index 257bd01..d0bcdba 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c @@ -26,11 +26,13 @@ #include <asm/udbg.h> #include <asm/mpic.h> #include <asm/ehv_pic.h> +#include <asm/qe_ic.h> #include <linux/of_platform.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> #include "smp.h" +#include "mpc85xx.h" #include <linux/fsl_usdpaa.h> @@ -40,6 +42,8 @@ void __init corenet_gen_pic_init(void) unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU | MPIC_NO_RESET; + struct device_node *np; + if (ppc_md.get_irq == mpic_get_coreint_irq) flags |= MPIC_ENABLE_COREINT; @@ -47,6 +51,13 @@ void __init corenet_gen_pic_init(void) BUG_ON(mpic == NULL); mpic_init(mpic); + + np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); + if (np) { + qe_ic_init(np, 0, qe_ic_cascade_low_mpic, + qe_ic_cascade_high_mpic); + of_node_put(np); + } } /* @@ -59,6 +70,8 @@ void __init corenet_gen_setup_arch(void) swiotlb_detect_4g(); pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); + + mpc85xx_qe_init(); } static const struct of_device_id of_device_ids[] = { @@ -95,6 +108,9 @@ static const struct of_device_id of_device_ids[] = { { .compatible = "fsl,qoriq-pcie-v3.0", }, + { + .compatible = "fsl,qe", + }, /* The following two are for the Freescale hypervisor */ { .name = "hypervisor", |