diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-07 16:34:40 (GMT) |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-07 16:34:40 (GMT) |
commit | c818c778b0384e5d9e8184ec43b73e05a7ced86f (patch) | |
tree | 2d50257ac6f94448f1dfe2bb65b4ff5aa383fe4a /arch/powerpc/platforms | |
parent | c8de2fa4dc2778ae3605925c127b3deac54b2b3a (diff) | |
parent | 5737789c8340620d7b542d1d4e9b197de8eb2801 (diff) | |
download | linux-fsl-qoriq-c818c778b0384e5d9e8184ec43b73e05a7ced86f.tar.xz |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Benjamin Herrenschmidt:
"Here are a few more powerpc bits that I would like in 3.10.
Mostly remaining bolts & screw tightening of power8 support such as
actually exposing the new features via the previously added AT_HWCAP2,
and a few fixes, some of them for problems exposed recently like
irqdomain warnings or sysfs access permission issues, some exposed by
power8 hardware.
The only change outside of arch/powerpc is a small one to irqdomain.c
to allow silent failure to fix a problem on Cell where we get a dozen
WARN_ON's tripping at boot for what is basically a normal case."
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Make hard_irq_disable() do the right thing vs. irq tracing
powerpc/topology: Fix spurr attribute permission
powerpc/pci: Support per-aperture memory offset
powerpc/cell/iommu: Improve error message for missing node
powerpc/cell/spufs: Fix status attribute permission
irqdomain: Allow quiet failure mode
powerpc/pnv: Fix "compatible" property for P8 PHB
powerpc/pci: Don't add bogus empty resources to PHBs
powerpc/powerpnv: Properly handle failure starting CPUs
powerpc/cputable: Advertise support for ISEL/HTM/DSCR/TAR on POWER8
powerpc/cputable: Advertise ISEL support on appropriate embedded processors
powerpc/cputable: Advertise DSCR support on P7/P7+
powerpc/cputable: Reserve bits in HWCAP2 for new features
powerpc/pseries: Perform proper max_bus_speed detection
powerpc/pseries: Force 32 bit MSIs for devices that require it
powerpc/tm: Fix null pointer deference in flush_hash_page
powerpc/powernv: Defer OPAL exception handler registration
powerpc: Emulate non privileged DSCR read and write
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r-- | arch/powerpc/platforms/cell/iommu.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/cell/spu_base.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/embedded6xx/mpc10x.h | 11 | ||||
-rw-r--r-- | arch/powerpc/platforms/powermac/pci.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/powernv/opal.c | 15 | ||||
-rw-r--r-- | arch/powerpc/platforms/powernv/pci-ioda.c | 12 | ||||
-rw-r--r-- | arch/powerpc/platforms/powernv/smp.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/msi.c | 21 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/pci.c | 53 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/pseries.h | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/setup.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/wsp/wsp_pci.c | 2 |
12 files changed, 104 insertions, 26 deletions
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index e56bb65..946306b 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c @@ -550,7 +550,7 @@ static struct iommu_table *cell_get_iommu_table(struct device *dev) */ iommu = cell_iommu_for_node(dev_to_node(dev)); if (iommu == NULL || list_empty(&iommu->windows)) { - printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n", + dev_err(dev, "iommu: missing iommu for %s (node %d)\n", of_node_full_name(dev->of_node), dev_to_node(dev)); return NULL; } diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c index 8b12139..f85db3a 100644 --- a/arch/powerpc/platforms/cell/spu_base.c +++ b/arch/powerpc/platforms/cell/spu_base.c @@ -715,7 +715,7 @@ static ssize_t spu_stat_show(struct device *dev, spu->stats.libassist); } -static DEVICE_ATTR(stat, 0644, spu_stat_show, NULL); +static DEVICE_ATTR(stat, 0444, spu_stat_show, NULL); #ifdef CONFIG_KEXEC diff --git a/arch/powerpc/platforms/embedded6xx/mpc10x.h b/arch/powerpc/platforms/embedded6xx/mpc10x.h index b30a6a3..b290b63 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc10x.h +++ b/arch/powerpc/platforms/embedded6xx/mpc10x.h @@ -81,17 +81,6 @@ #define MPC10X_MAPB_PCI_MEM_OFFSET (MPC10X_MAPB_ISA_MEM_BASE - \ MPC10X_MAPB_PCI_MEM_START) -/* Set hose members to values appropriate for the mem map used */ -#define MPC10X_SETUP_HOSE(hose, map) { \ - (hose)->pci_mem_offset = MPC10X_MAP##map##_PCI_MEM_OFFSET; \ - (hose)->io_space.start = MPC10X_MAP##map##_PCI_IO_START; \ - (hose)->io_space.end = MPC10X_MAP##map##_PCI_IO_END; \ - (hose)->mem_space.start = MPC10X_MAP##map##_PCI_MEM_START; \ - (hose)->mem_space.end = MPC10X_MAP##map##_PCI_MEM_END; \ - (hose)->io_base_virt = (void *)MPC10X_MAP##map##_ISA_IO_BASE; \ -} - - /* Miscellaneous Configuration register offsets */ #define MPC10X_CFG_PIR_REG 0x09 #define MPC10X_CFG_PIR_HOST_BRIDGE 0x00 diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 2b8af75..cf7009b 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c @@ -824,6 +824,7 @@ static void __init parse_region_decode(struct pci_controller *hose, hose->mem_resources[cur].name = hose->dn->full_name; hose->mem_resources[cur].start = base; hose->mem_resources[cur].end = end; + hose->mem_offset[cur] = 0; DBG(" %d: 0x%08lx-0x%08lx\n", cur, base, end); } else { DBG(" : -0x%08lx\n", end); @@ -866,7 +867,6 @@ static void __init setup_u3_ht(struct pci_controller* hose) hose->io_resource.start = 0; hose->io_resource.end = 0x003fffff; hose->io_resource.flags = IORESOURCE_IO; - hose->pci_mem_offset = 0; hose->first_busno = 0; hose->last_busno = 0xef; diff --git a/arch/powerpc/platforms/powernv/opal.c b/arch/powerpc/platforms/powernv/opal.c index aaa0dba..ade4463 100644 --- a/arch/powerpc/platforms/powernv/opal.c +++ b/arch/powerpc/platforms/powernv/opal.c @@ -34,7 +34,6 @@ int __init early_init_dt_scan_opal(unsigned long node, { const void *basep, *entryp; unsigned long basesz, entrysz; - u64 glue; if (depth != 1 || strcmp(uname, "ibm,opal") != 0) return 0; @@ -61,6 +60,16 @@ int __init early_init_dt_scan_opal(unsigned long node, printk("OPAL V1 detected !\n"); } + return 1; +} + +static int __init opal_register_exception_handlers(void) +{ + u64 glue; + + if (!(powerpc_firmware_features & FW_FEATURE_OPAL)) + return -ENODEV; + /* Hookup some exception handlers. We use the fwnmi area at 0x7000 * to provide the glue space to OPAL */ @@ -74,9 +83,11 @@ int __init early_init_dt_scan_opal(unsigned long node, glue += 128; opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue); - return 1; + return 0; } +early_initcall(opal_register_exception_handlers); + int opal_get_chars(uint32_t vtermno, char *buf, int count) { s64 len, rc; diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 8c6c9cf..1da578b 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -915,11 +915,14 @@ static void pnv_ioda_setup_pe_seg(struct pci_controller *hose, index++; } } else if (res->flags & IORESOURCE_MEM) { + /* WARNING: Assumes M32 is mem region 0 in PHB. We need to + * harden that algorithm when we start supporting M64 + */ region.start = res->start - - hose->pci_mem_offset - + hose->mem_offset[0] - phb->ioda.m32_pci_base; region.end = res->end - - hose->pci_mem_offset - + hose->mem_offset[0] - phb->ioda.m32_pci_base; index = region.start / phb->ioda.m32_segsize; @@ -1089,7 +1092,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type) /* Detect specific models for error handling */ if (of_device_is_compatible(np, "ibm,p7ioc-pciex")) phb->model = PNV_PHB_MODEL_P7IOC; - else if (of_device_is_compatible(np, "ibm,p8-pciex")) + else if (of_device_is_compatible(np, "ibm,power8-pciex")) phb->model = PNV_PHB_MODEL_PHB3; else phb->model = PNV_PHB_MODEL_UNKNOWN; @@ -1115,8 +1118,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, int ioda_type) phb->ioda.m32_size += 0x10000; phb->ioda.m32_segsize = phb->ioda.m32_size / phb->ioda.total_pe; - phb->ioda.m32_pci_base = hose->mem_resources[0].start - - hose->pci_mem_offset; + phb->ioda.m32_pci_base = hose->mem_resources[0].start - hose->mem_offset[0]; phb->ioda.io_size = hose->pci_io_size; phb->ioda.io_segsize = phb->ioda.io_size / phb->ioda.total_pe; phb->ioda.io_pci_base = 0; /* XXX calculate this ? */ diff --git a/arch/powerpc/platforms/powernv/smp.c b/arch/powerpc/platforms/powernv/smp.c index 0bdc735..6a3ecca 100644 --- a/arch/powerpc/platforms/powernv/smp.c +++ b/arch/powerpc/platforms/powernv/smp.c @@ -77,9 +77,11 @@ int pnv_smp_kick_cpu(int nr) if (!paca[nr].cpu_start && firmware_has_feature(FW_FEATURE_OPALv2)) { pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu); rc = opal_start_cpu(pcpu, start_here); - if (rc != OPAL_SUCCESS) + if (rc != OPAL_SUCCESS) { pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr); + return -ENODEV; + } } return smp_generic_kick_cpu(nr); } diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c index e5b0847..420524e 100644 --- a/arch/powerpc/platforms/pseries/msi.c +++ b/arch/powerpc/platforms/pseries/msi.c @@ -24,6 +24,7 @@ static int query_token, change_token; #define RTAS_RESET_FN 2 #define RTAS_CHANGE_MSI_FN 3 #define RTAS_CHANGE_MSIX_FN 4 +#define RTAS_CHANGE_32MSI_FN 5 static struct pci_dn *get_pdn(struct pci_dev *pdev) { @@ -58,7 +59,8 @@ static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs) seq_num = 1; do { - if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN) + if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN || + func == RTAS_CHANGE_32MSI_FN) rc = rtas_call(change_token, 6, 4, rtas_ret, addr, BUID_HI(buid), BUID_LO(buid), func, num_irqs, seq_num); @@ -426,9 +428,12 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec_in, int type) */ again: if (type == PCI_CAP_ID_MSI) { - rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec); + if (pdn->force_32bit_msi) + rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec); + else + rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec); - if (rc < 0) { + if (rc < 0 && !pdn->force_32bit_msi) { pr_debug("rtas_msi: trying the old firmware call.\n"); rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec); } @@ -512,3 +517,13 @@ static int rtas_msi_init(void) return 0; } arch_initcall(rtas_msi_init); + +static void quirk_radeon(struct pci_dev *dev) +{ + struct pci_dn *pdn = get_pdn(dev); + + if (pdn) + pdn->force_32bit_msi = 1; +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x68f2, quirk_radeon); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0xaa68, quirk_radeon); diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index 0b580f4..5f93856 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c @@ -108,3 +108,56 @@ static void fixup_winbond_82c105(struct pci_dev* dev) } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, fixup_winbond_82c105); + +int pseries_root_bridge_prepare(struct pci_host_bridge *bridge) +{ + struct device_node *dn, *pdn; + struct pci_bus *bus; + const uint32_t *pcie_link_speed_stats; + + bus = bridge->bus; + + dn = pcibios_get_phb_of_node(bus); + if (!dn) + return 0; + + for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) { + pcie_link_speed_stats = (const uint32_t *) of_get_property(pdn, + "ibm,pcie-link-speed-stats", NULL); + if (pcie_link_speed_stats) + break; + } + + of_node_put(pdn); + + if (!pcie_link_speed_stats) { + pr_err("no ibm,pcie-link-speed-stats property\n"); + return 0; + } + + switch (pcie_link_speed_stats[0]) { + case 0x01: + bus->max_bus_speed = PCIE_SPEED_2_5GT; + break; + case 0x02: + bus->max_bus_speed = PCIE_SPEED_5_0GT; + break; + default: + bus->max_bus_speed = PCI_SPEED_UNKNOWN; + break; + } + + switch (pcie_link_speed_stats[1]) { + case 0x01: + bus->cur_bus_speed = PCIE_SPEED_2_5GT; + break; + case 0x02: + bus->cur_bus_speed = PCIE_SPEED_5_0GT; + break; + default: + bus->cur_bus_speed = PCI_SPEED_UNKNOWN; + break; + } + + return 0; +} diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h index 8af71e4..c2a3a25 100644 --- a/arch/powerpc/platforms/pseries/pseries.h +++ b/arch/powerpc/platforms/pseries/pseries.h @@ -63,4 +63,8 @@ extern int dlpar_detach_node(struct device_node *); /* Snooze Delay, pseries_idle */ DECLARE_PER_CPU(long, smt_snooze_delay); +/* PCI root bridge prepare function override for pseries */ +struct pci_host_bridge; +int pseries_root_bridge_prepare(struct pci_host_bridge *bridge); + #endif /* _PSERIES_PSERIES_H */ diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index ac932a9..c11c823 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c @@ -466,6 +466,8 @@ static void __init pSeries_setup_arch(void) else ppc_md.enable_pmcs = power4_enable_pmcs; + ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; + if (firmware_has_feature(FW_FEATURE_SET_MODE)) { long rc; if ((rc = pSeries_enable_reloc_on_exc()) != H_SUCCESS) { diff --git a/arch/powerpc/platforms/wsp/wsp_pci.c b/arch/powerpc/platforms/wsp/wsp_pci.c index 8e22f56..62cb527 100644 --- a/arch/powerpc/platforms/wsp/wsp_pci.c +++ b/arch/powerpc/platforms/wsp/wsp_pci.c @@ -502,7 +502,7 @@ static void __init wsp_pcie_configure_hw(struct pci_controller *hose) (~(hose->mem_resources[0].end - hose->mem_resources[0].start)) & 0x3ffffff0000ul); out_be64(hose->cfg_data + PCIE_REG_M32A_START_ADDR, - (hose->mem_resources[0].start - hose->pci_mem_offset) | 1); + (hose->mem_resources[0].start - hose->mem_offset[0]) | 1); /* Clear all TVT entries * |