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authorLaurentiu Tudor <Laurentiu.Tudor@freescale.com>2013-05-23 09:21:51 (GMT)
committerFleming Andrew-AFLEMING <AFLEMING@freescale.com>2013-05-24 20:27:05 (GMT)
commit313b229e8408280d0bf8b89e662699b049168731 (patch)
tree2f3898029aea4a9cb68644d0c781452227d72aeb /arch/powerpc
parent629bc68abbdef896eace12d1bc41a7ce31e368b3 (diff)
downloadlinux-fsl-qoriq-313b229e8408280d0bf8b89e662699b049168731.tar.xz
powerpc/fsl: Introduce a generic pci-e compatible named "fsl,qoriq-pcie"
This will allow future code to simply check the pci-e controller version register plus getting rid of the redundant version from within the compatible string. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Change-Id: I7211a7c426f9e11920369355900ccd236fc248a1 Reviewed-on: http://git.am.freescale.net:8181/2670 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com> Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/boot/dts/fsl/b4420si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/b4si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/p1010si-post.dtsi4
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi6
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi6
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi6
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi8
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi6
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi8
12 files changed, 30 insertions, 30 deletions
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
index c914b7a..f039c52 100644
--- a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -230,7 +230,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,b4420-pcie", "fsl,qoriq-pcie-v2.4";
+ compatible = "fsl,b4420-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
};
&dcsr {
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index c37f33f..a166d1c 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -371,7 +371,7 @@
};
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
+ compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
};
&rio {
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 918f948..6e2781e 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4";
+ compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
index 20962ab..ea50a5f 100644
--- a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
@@ -42,7 +42,7 @@
/* controller at 0xa000 */
&pci0 {
- compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index 055cece..1804ed7 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x9000 */
&pci0 {
- compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
+ compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -69,7 +69,7 @@
/* controller at 0xa000 */
&pci1 {
- compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3";
+ compatible = "fsl,p1010-pcie", "fsl,qoriq-pcie-v2.3", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index 334ffba..f69daaf 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -42,7 +42,7 @@
/* controller at 0xa000 */
&pci0 {
- compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -61,7 +61,7 @@
/* controller at 0x9000 */
&pci1 {
- compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -80,7 +80,7 @@
/* controller at 0xb000 */
&pci2 {
- compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p1023-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 204a9ad..1e1b810 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -70,7 +70,7 @@
/* controller at 0x201000 */
&pci1 {
- compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -99,7 +99,7 @@
/* controller at 0x202000 */
&pci2 {
- compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 3191d54..1e84f0f 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -70,7 +70,7 @@
/* controller at 0x201000 */
&pci1 {
- compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -99,7 +99,7 @@
/* controller at 0x202000 */
&pci2 {
- compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -128,7 +128,7 @@
/* controller at 0x203000 */
&pci3 {
- compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 6383d9a..5f9b908 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
+ compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -70,7 +70,7 @@
/* controller at 0x201000 */
&pci1 {
- compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
+ compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -99,7 +99,7 @@
/* controller at 0x202000 */
&pci2 {
- compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1";
+ compatible = "fsl,p4080-pcie", "fsl,qoriq-pcie-v2.1", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 0c3ae85..ea5db06 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -70,7 +70,7 @@
/* controller at 0x201000 */
&pci1 {
- compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -99,7 +99,7 @@
/* controller at 0x202000 */
&pci2 {
- compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -128,7 +128,7 @@
/* controller at 0x203000 */
&pci3 {
- compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+ compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 8474161..571eeab 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x200000 */
&pci0 {
- compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
+ compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -69,7 +69,7 @@
/* controller at 0x201000 */
&pci1 {
- compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
+ compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -97,7 +97,7 @@
/* controller at 0x202000 */
&pci2 {
- compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
+ compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index c16b972..f51545c 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -41,7 +41,7 @@
/* controller at 0x240000 */
&pci0 {
- compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
+ compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -67,7 +67,7 @@
/* controller at 0x250000 */
&pci1 {
- compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
+ compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -93,7 +93,7 @@
/* controller at 0x260000 */
&pci2 {
- compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
+ compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
@@ -119,7 +119,7 @@
/* controller at 0x270000 */
&pci3 {
- compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
+ compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
generated by cgit v0.10.2 at 2024-07-05 18:34:03 (GMT)