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author | Michael Neuling <mikey@neuling.org> | 2012-06-25 13:33:09 (GMT) |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-07-10 09:17:52 (GMT) |
commit | 564aa5cfd3e33ef69a5ca6c170a0fe79c6805e52 (patch) | |
tree | 5a6e5478b168f4e9c0f09a334f3d9d75c8a803b4 /arch/powerpc | |
parent | 82fff310f18e274a8e3f0aff5669928ab45c8dab (diff) | |
download | linux-fsl-qoriq-564aa5cfd3e33ef69a5ca6c170a0fe79c6805e52.tar.xz |
powerpc: Modify macro ready for %r0 register change
The assembler doesn't take %r0 register arguments in braces, so remove them.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/include/asm/ppc_asm.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index 1544420..19205f5 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h @@ -295,14 +295,14 @@ n: */ #ifdef __powerpc64__ #define LOAD_REG_IMMEDIATE(reg,expr) \ - lis (reg),(expr)@highest; \ - ori (reg),(reg),(expr)@higher; \ - rldicr (reg),(reg),32,31; \ - oris (reg),(reg),(expr)@h; \ - ori (reg),(reg),(expr)@l; + lis reg,(expr)@highest; \ + ori reg,reg,(expr)@higher; \ + rldicr reg,reg,32,31; \ + oris reg,reg,(expr)@h; \ + ori reg,reg,(expr)@l; #define LOAD_REG_ADDR(reg,name) \ - ld (reg),name@got(r2) + ld reg,name@got(r2) #define LOAD_REG_ADDRBASE(reg,name) LOAD_REG_ADDR(reg,name) #define ADDROFF(name) 0 @@ -313,12 +313,12 @@ n: #else /* 32-bit */ #define LOAD_REG_IMMEDIATE(reg,expr) \ - lis (reg),(expr)@ha; \ - addi (reg),(reg),(expr)@l; + lis reg,(expr)@ha; \ + addi reg,reg,(expr)@l; #define LOAD_REG_ADDR(reg,name) LOAD_REG_IMMEDIATE(reg, name) -#define LOAD_REG_ADDRBASE(reg, name) lis (reg),name@ha +#define LOAD_REG_ADDRBASE(reg, name) lis reg,name@ha #define ADDROFF(name) name@l /* offsets for stack frame layout */ |