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authorScott Wood <scottwood@freescale.com>2012-10-02 06:01:07 (GMT)
committerEmil Medve <Emilian.Medve@Freescale.com>2013-03-21 18:42:17 (GMT)
commit8b0b87f6b5f76c8d2b18c2f1c2e0dd7916862976 (patch)
tree59fada59c6b0d38cadf00c6553b9e4f363c637e2 /arch/powerpc
parentf2bad184b39f04ec86e8af4f816d1bbf6b32f62f (diff)
downloadlinux-fsl-qoriq-8b0b87f6b5f76c8d2b18c2f1c2e0dd7916862976.tar.xz
powerpc/mpc85xx: avoid tlbivax when tlbilx exists
Erratum A-004827 means that tlbivax is unusable on some chips (e.g. b4420). Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/kernel/fsl_booke_entry_mapping.S15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
index a92c79b..9638e50 100644
--- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
+++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S
@@ -60,6 +60,10 @@ skpinv: addi r6,r6,1 /* Increment */
cmpw r6,r9 /* Are we done? */
bne 1b /* If not, repeat */
+#ifdef CONFIG_PPC_E500MC
+ /* Some chips can't handle tlbivax due to erratum A-004827 */
+ tlbilxlpid
+#else
/* Invalidate TLB0 */
li r6,0x04
tlbivax 0,r6
@@ -68,6 +72,7 @@ skpinv: addi r6,r6,1 /* Increment */
li r6,0x0c
tlbivax 0,r6
TLBSYNC
+#endif
/* 3. Setup a temp mapping and jump to it */
andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */
@@ -147,10 +152,15 @@ skpinv: addi r6,r6,1 /* Increment */
rlwinm r6,r6,0,2,0 /* clear IPROT */
mtspr SPRN_MAS1,r6
tlbwe
+#ifdef CONFIG_PPC_E500MC
+ /* Some chips can't handle tlbivax due to erratum A-004827 */
+ tlbilxlpid
+#else
/* Invalidate TLB1 */
li r9,0x0c
tlbivax 0,r9
TLBSYNC
+#endif
/* The mapping only needs to be cache-coherent on SMP */
#ifdef CONFIG_SMP
@@ -229,7 +239,12 @@ next_tlb_setup:
rlwinm r8,r8,0,2,0 /* clear IPROT */
mtspr SPRN_MAS1,r8
tlbwe
+#ifdef CONFIG_PPC_E500MC
+ /* Some chips can't handle tlbivax due to erratum A-004827 */
+ tlbilxlpid
+#else
/* Invalidate TLB1 */
li r9,0x0c
tlbivax 0,r9
TLBSYNC
+#endif