diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2011-03-08 22:26:58 (GMT) |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-03-10 00:04:02 (GMT) |
commit | 94347cb34983f9862477776d0c169607c4434f2b (patch) | |
tree | a5bd7fcbf709e8ad258c8daa9d07bdcea6e166a5 /arch/powerpc | |
parent | febd40178782e47b33f261f4e135418e24d8420a (diff) | |
download | linux-fsl-qoriq-94347cb34983f9862477776d0c169607c4434f2b.tar.xz |
powerpc: sysdev/mpc8xxx_gpio irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/sysdev/mpc8xxx_gpio.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c index c48cd81..11fb518 100644 --- a/arch/powerpc/sysdev/mpc8xxx_gpio.c +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c @@ -155,43 +155,43 @@ static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc) 32 - ffs(mask))); } -static void mpc8xxx_irq_unmask(unsigned int virq) +static void mpc8xxx_irq_unmask(struct irq_data *d) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; unsigned long flags; spin_lock_irqsave(&mpc8xxx_gc->lock, flags); - setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq))); + setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); } -static void mpc8xxx_irq_mask(unsigned int virq) +static void mpc8xxx_irq_mask(struct irq_data *d) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; unsigned long flags; spin_lock_irqsave(&mpc8xxx_gc->lock, flags); - clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq))); + clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); } -static void mpc8xxx_irq_ack(unsigned int virq) +static void mpc8xxx_irq_ack(struct irq_data *d) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; - out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq))); + out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); } -static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type) +static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; unsigned long flags; @@ -199,14 +199,14 @@ static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type) case IRQ_TYPE_EDGE_FALLING: spin_lock_irqsave(&mpc8xxx_gc->lock, flags); setbits32(mm->regs + GPIO_ICR, - mpc8xxx_gpio2mask(virq_to_hw(virq))); + mpc8xxx_gpio2mask(virq_to_hw(d->irq))); spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); break; case IRQ_TYPE_EDGE_BOTH: spin_lock_irqsave(&mpc8xxx_gc->lock, flags); clrbits32(mm->regs + GPIO_ICR, - mpc8xxx_gpio2mask(virq_to_hw(virq))); + mpc8xxx_gpio2mask(virq_to_hw(d->irq))); spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); break; @@ -217,11 +217,11 @@ static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type) return 0; } -static int mpc512x_irq_set_type(unsigned int virq, unsigned int flow_type) +static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type) { - struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq); + struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; - unsigned long gpio = virq_to_hw(virq); + unsigned long gpio = virq_to_hw(d->irq); void __iomem *reg; unsigned int shift; unsigned long flags; @@ -264,10 +264,10 @@ static int mpc512x_irq_set_type(unsigned int virq, unsigned int flow_type) static struct irq_chip mpc8xxx_irq_chip = { .name = "mpc8xxx-gpio", - .unmask = mpc8xxx_irq_unmask, - .mask = mpc8xxx_irq_mask, - .ack = mpc8xxx_irq_ack, - .set_type = mpc8xxx_irq_set_type, + .irq_unmask = mpc8xxx_irq_unmask, + .irq_mask = mpc8xxx_irq_mask, + .irq_ack = mpc8xxx_irq_ack, + .irq_set_type = mpc8xxx_irq_set_type, }; static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq, @@ -276,7 +276,7 @@ static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq, struct mpc8xxx_gpio_chip *mpc8xxx_gc = h->host_data; if (mpc8xxx_gc->of_dev_id_data) - mpc8xxx_irq_chip.set_type = mpc8xxx_gc->of_dev_id_data; + mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data; set_irq_chip_data(virq, h->host_data); set_irq_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq); |