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authorPaul Mundt <lethal@linux-sh.org>2009-06-24 08:53:33 (GMT)
committerPaul Mundt <lethal@linux-sh.org>2009-06-24 08:53:33 (GMT)
commit00b9de9c249f51f09c19aa41cbbb3e3eb4eea807 (patch)
tree28715dbc2472e6da8b7d670e63439172a1de9a6b /arch/sh/kernel/cpu/sh4a
parentbb38c222e07cbe252cfbd99cd6a9c834b0a2639a (diff)
downloadlinux-fsl-qoriq-00b9de9c249f51f09c19aa41cbbb3e3eb4eea807.tar.xz
serial: sh-sci: Move SCSCR_INIT in to platform data.
This moves all of the SCSCR_INIT definitions in to the platform data, for future consolidation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a')
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c1
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c3
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c10
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c4
11 files changed, 54 insertions, 6 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 6307e08..09fb581 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -269,24 +269,28 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
}, {
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
}, {
.mapbase = 0xffe20000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
}, {
.mapbase = 0xffe30000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 83, 83, 83, 83 },
.clk = "scif3",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index c18f7d0..307777c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -280,6 +280,7 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index ea524a2..ffc69bc 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -305,25 +305,25 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
- },
- {
+ }, {
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
- },
- {
+ }, {
.mapbase = 0xffe20000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
- },
- {
+ }, {
.flags = 0,
}
};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index e1bb80b..6ce331a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -321,36 +321,42 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
},{
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
},{
.mapbase = 0xffe20000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
},{
.mapbase = 0xa4e30000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIFA,
.irqs = { 56, 56, 56, 56 },
.clk = "scif3",
},{
.mapbase = 0xa4e40000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIFA,
.irqs = { 88, 88, 88, 88 },
.clk = "scif4",
},{
.mapbase = 0xa4e50000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIFA,
.irqs = { 109, 109, 109, 109 },
.clk = "scif5",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index e5ac9eb..4bf03c1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -28,36 +28,42 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 80, 80, 80, 80 },
.clk = "scif0",
}, {
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 81, 81, 81, 81 },
.clk = "scif1",
}, {
.mapbase = 0xffe20000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 82, 82, 82, 82 },
.clk = "scif2",
}, {
.mapbase = 0xa4e30000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIFA,
.irqs = { 56, 56, 56, 56 },
.clk = "scif3",
}, {
.mapbase = 0xa4e40000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIFA,
.irqs = { 88, 88, 88, 88 },
.clk = "scif4",
}, {
.mapbase = 0xa4e50000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIFA,
.irqs = { 109, 109, 109, 109 },
.clk = "scif5",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index f1e0c0d..76339c6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -40,16 +40,19 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 40, 40, 40, 40 },
}, {
.mapbase = 0xffe08000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 76, 76, 76, 76 },
}, {
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 104, 104, 104, 104 },
}, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 1e86209..07a41ff 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -18,51 +18,61 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xff923000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 61, 61, 61, 61 },
}, {
.mapbase = 0xff924000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 62, 62, 62, 62 },
}, {
.mapbase = 0xff925000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 63, 63, 63, 63 },
}, {
.mapbase = 0xff926000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 64, 64, 64, 64 },
}, {
.mapbase = 0xff927000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 65, 65, 65, 65 },
}, {
.mapbase = 0xff928000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 66, 66, 66, 66 },
}, {
.mapbase = 0xff929000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 67, 67, 67, 67 },
}, {
.mapbase = 0xff92a000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 68, 68, 68, 68 },
}, {
.mapbase = 0xff92b000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 69, 69, 69, 69 },
}, {
.mapbase = 0xff92c000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF,
.irqs = { 70, 70, 70, 70 },
}, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 715e05b..2b355b6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -220,11 +220,13 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffe00000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 40, 40, 40, 40 },
}, {
.mapbase = 0xffe10000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 76, 76, 76, 76 },
}, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index af56140..acd4b1d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -202,36 +202,42 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffea0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 40, 40, 40, 40 },
.clk = "scif_fck",
}, {
.mapbase = 0xffeb0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 44, 44, 44, 44 },
.clk = "scif_fck",
}, {
.mapbase = 0xffec0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 60, 60, 60, 60 },
.clk = "scif_fck",
}, {
.mapbase = 0xffed0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 61, 61, 61, 61 },
.clk = "scif_fck",
}, {
.mapbase = 0xffee0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 62, 62, 62, 62 },
.clk = "scif_fck",
}, {
.mapbase = 0xffef0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 63, 63, 63, 63 },
.clk = "scif_fck",
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index b700494..347ce88 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -27,6 +27,7 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffea0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 40, 41, 43, 42 },
},
@@ -36,26 +37,31 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffeb0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 44, 44, 44, 44 },
}, {
.mapbase = 0xffec0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 50, 50, 50, 50 },
}, {
.mapbase = 0xffed0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 51, 51, 51, 51 },
}, {
.mapbase = 0xffee0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 52, 52, 52, 52 },
}, {
.mapbase = 0xffef0000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF,
.irqs = { 53, 53, 53, 53 },
}, {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 53c65fd..eef9493 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -19,21 +19,25 @@ static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffc30000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 40, 41, 43, 42 },
}, {
.mapbase = 0xffc40000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 44, 45, 47, 46 },
}, {
.mapbase = 0xffc50000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 48, 49, 51, 50 },
}, {
.mapbase = 0xffc60000,
.flags = UPF_BOOT_AUTOCONF,
+ .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
.type = PORT_SCIF,
.irqs = { 52, 53, 55, 54 },
}, {
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