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| author | David S. Miller <davem@davemloft.net> | 2011-09-11 17:42:20 (GMT) |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-09-16 21:21:33 (GMT) |
| commit | 08cefa9fa7e5b3ddaefb8b7bfa408d148429c08d (patch) | |
| tree | 07a33d960d2ce5d72733dd21cf8d179fd06d145a /arch/sparc/include/asm/xor_64.h | |
| parent | 1a8e0da5937a6c87807083baa318cf8f98dac9aa (diff) | |
| download | linux-fsl-qoriq-08cefa9fa7e5b3ddaefb8b7bfa408d148429c08d.tar.xz | |
sparc64: Future proof Niagara cpu detection.
Recognize T4 and T5 chips. Treating them both as "T2 plus other
stuff" should be extremely safe and make sure distributions will work
when those chips actually ship to customers.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/xor_64.h')
| -rw-r--r-- | arch/sparc/include/asm/xor_64.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/xor_64.h b/arch/sparc/include/asm/xor_64.h index 9ed6ff6..ee8edc6 100644 --- a/arch/sparc/include/asm/xor_64.h +++ b/arch/sparc/include/asm/xor_64.h @@ -66,6 +66,8 @@ static struct xor_block_template xor_block_niagara = { ((tlb_type == hypervisor && \ (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ sun4v_chip_type == SUN4V_CHIP_NIAGARA2 || \ - sun4v_chip_type == SUN4V_CHIP_NIAGARA3)) ? \ + sun4v_chip_type == SUN4V_CHIP_NIAGARA3 || \ + sun4v_chip_type == SUN4V_CHIP_NIAGARA4 || \ + sun4v_chip_type == SUN4V_CHIP_NIAGARA5)) ? \ &xor_block_niagara : \ &xor_block_VIS) |