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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-05 03:08:49 (GMT)
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-05 03:08:49 (GMT)
commitf589e9bfcfc4ec2b59bf36b994b75012c155799e (patch)
treee5dc8687617f52df1863214565908a0f785a838d /arch/sparc/mm/init_64.c
parent173192958d06b8d1eb44f56d74373052ad6a9a60 (diff)
parent048c9acca90ca7da42b92745445fe008a48add88 (diff)
downloadlinux-fsl-qoriq-f589e9bfcfc4ec2b59bf36b994b75012c155799e.tar.xz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next
Pull sparc updates from David Miller: 1) Hibernation support, as well as removal of excess interrupt twiddling in MMU context allocation on sparc64 from Kirill Tkhai. 2) Kill references to __ARCH_WANT_UNLOCKED_CTXSW. 3) Sparc32 LEON bug fixes from Daniel Hellstrom and Andreas Larsson. 4) Provide cmpxchg64(), from Geert Uytterhoeven. 5) Device refcount and registry bug fixes from Federico Vaga and Wei Yongjun. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next: serial: sunsu: add missing platform_driver_unregister() when module exit sparc32, leon: Do not overwrite previously set irq flow handlers sparc/kernel/vio.c: add put_device() after device_find_child() sparc64: Do not save/restore interrupts in get_new_mmu_context() sparc: Consistently use 'wr' and 'rd' instructions for ASRs. sparc64: Kill __ARCH_WANT_UNLOCKED_CTXSW sparc64: Provide cmpxchg64() sparc64: Do not change num_physpages during initmem freeing sparc64: Hibernation support sparc,leon: updated GRPCI2 config name sparc,leon: support for GRPCI1 PCI host bridge controller sparc32,leon: add support for PCI busn resource for GRPCI2
Diffstat (limited to 'arch/sparc/mm/init_64.c')
-rw-r--r--arch/sparc/mm/init_64.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 6ac99d6..cf72a8a 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -681,10 +681,9 @@ void get_new_mmu_context(struct mm_struct *mm)
{
unsigned long ctx, new_ctx;
unsigned long orig_pgsz_bits;
- unsigned long flags;
int new_version;
- spin_lock_irqsave(&ctx_alloc_lock, flags);
+ spin_lock(&ctx_alloc_lock);
orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK);
ctx = (tlb_context_cache + 1) & CTX_NR_MASK;
new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx);
@@ -720,7 +719,7 @@ void get_new_mmu_context(struct mm_struct *mm)
out:
tlb_context_cache = new_ctx;
mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits;
- spin_unlock_irqrestore(&ctx_alloc_lock, flags);
+ spin_unlock(&ctx_alloc_lock);
if (unlikely(new_version))
smp_new_mmu_context_version();
@@ -2125,7 +2124,6 @@ void free_initmem(void)
ClearPageReserved(p);
init_page_count(p);
__free_page(p);
- num_physpages++;
totalram_pages++;
}
}
@@ -2142,7 +2140,6 @@ void free_initrd_mem(unsigned long start, unsigned long end)
ClearPageReserved(p);
init_page_count(p);
__free_page(p);
- num_physpages++;
totalram_pages++;
}
}