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authorChris Metcalf <cmetcalf@tilera.com>2013-08-10 17:15:46 (GMT)
committerChris Metcalf <cmetcalf@tilera.com>2013-08-30 15:57:02 (GMT)
commita718e10cbaa28035b7ab510d68fef68524454e1a (patch)
tree64b9283a5d94e2aa78046cc52f47757a8224d8ed /arch/tile/include/asm/pgtable_32.h
parent35f059761c5ac313d13372fe3cdaa41bce3d0dbf (diff)
downloadlinux-fsl-qoriq-a718e10cbaa28035b7ab510d68fef68524454e1a.tar.xz
tile: handle super huge pages in virt_to_pte
This tile-specific API had a minor bug, in that if a super huge (>4GB) page mapped a particular address range, we wouldn't handle it correctly. As part of fixing that bug, I also cleaned up some of the pud and pmd accessors to make them more consistent. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/include/asm/pgtable_32.h')
-rw-r--r--arch/tile/include/asm/pgtable_32.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/tile/include/asm/pgtable_32.h b/arch/tile/include/asm/pgtable_32.h
index 4ce4a7a..e5bdc0e 100644
--- a/arch/tile/include/asm/pgtable_32.h
+++ b/arch/tile/include/asm/pgtable_32.h
@@ -84,6 +84,8 @@ extern unsigned long VMALLOC_RESERVE /* = CONFIG_VMALLOC_RESERVE */;
/* We have no pmd or pud since we are strictly a two-level page table */
#include <asm-generic/pgtable-nopmd.h>
+static inline int pud_huge_page(pud_t pud) { return 0; }
+
/* We don't define any pgds for these addresses. */
static inline int pgd_addr_invalid(unsigned long addr)
{