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| author | Markus Metzger <markus.t.metzger@googlemail.com> | 2008-11-09 13:29:21 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-11-10 07:50:32 (GMT) |
| commit | f4166c54bfe04f64603974058e44fbd7cfef0ccc (patch) | |
| tree | 952c9e53143990dbd6159cb6c2412498d84a49e3 /arch/x86/kernel/ptrace.c | |
| parent | f7160c7573615ec82c691e294cf80d920b5d588d (diff) | |
| download | linux-fsl-qoriq-f4166c54bfe04f64603974058e44fbd7cfef0ccc.tar.xz | |
x86, bts: DS and BTS initialization
Impact: widen BTS/PEBS ptrace enablement to more CPU models
Move BTS initialisation out of an #ifdef CONFIG_X86_64 guard.
Assume core2 BTS and DS layout for future models of family 6 processors.
Signed-off-by: Markus Metzger <markus.t.metzger@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/ptrace.c')
| -rw-r--r-- | arch/x86/kernel/ptrace.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 0a6d8c1..06180df 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c @@ -929,17 +929,16 @@ void __cpuinit ptrace_bts_init_intel(struct cpuinfo_x86 *c) switch (c->x86) { case 0x6: switch (c->x86_model) { + case 0 ... 0xC: + /* sorry, don't know about them */ + break; case 0xD: case 0xE: /* Pentium M */ bts_configure(&bts_cfg_pentium_m); break; - case 0xF: /* Core2 */ - case 0x1C: /* Atom */ + default: /* Core2, Atom, ... */ bts_configure(&bts_cfg_core2); break; - default: - /* sorry, don't know about them */ - break; } break; case 0xF: |