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author | Venki Pallipadi <venkatesh.pallipadi@intel.com> | 2008-05-09 20:05:19 (GMT) |
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committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2008-05-13 16:51:54 (GMT) |
commit | 77db9885646f8a88214ea482988d41f8f73630f4 (patch) | |
tree | 8adc0ff3a373c107a5226ed1afca23c23530f1c4 /arch/x86/pci/i386.c | |
parent | 439a7733e8fcbaee39979c10246101565834d6b2 (diff) | |
download | linux-fsl-qoriq-77db9885646f8a88214ea482988d41f8f73630f4.tar.xz |
x86/PCI: X86_PAT & mprotect
Some versions of X used the mprotect workaround to change caching type from UC
to WB, so that it can then use mtrr to program WC for that region [1]. Change
the mmap of pci space through /sys or /proc interfaces from UC to UC_MINUS.
With this change, X will not need to use mprotect workaround to get WC type
since the MTRR mapping type will be honored.
The bug in mprotect that clobbers PAT bits is fixed in a follow on patch. So,
this X workaround will stop working as well.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'arch/x86/pci/i386.c')
-rw-r--r-- | arch/x86/pci/i386.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 8af0f0b..10fb308 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c @@ -301,15 +301,13 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, prot = pgprot_val(vma->vm_page_prot); if (pat_wc_enabled && write_combine) prot |= _PAGE_CACHE_WC; - else if (pat_wc_enabled) + else if (pat_wc_enabled || boot_cpu_data.x86 > 3) /* * ioremap() and ioremap_nocache() defaults to UC MINUS for now. * To avoid attribute conflicts, request UC MINUS here * aswell. */ prot |= _PAGE_CACHE_UC_MINUS; - else if (boot_cpu_data.x86 > 3) - prot |= _PAGE_CACHE_UC; vma->vm_page_prot = __pgprot(prot); |