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authorZhao Qiang <B45475@freescale.com>2014-03-21 06:20:13 (GMT)
committerJose Rivera <German.Rivera@freescale.com>2014-03-26 22:21:11 (GMT)
commit014304dbab977b79a5f835374e4ea01fa7b0b1a1 (patch)
tree513a1f61fcc45e845927defafc6fac640080fd53 /arch
parent8b08afa449e757476d36ccac67bb84c7b11ef3db (diff)
downloadlinux-fsl-qoriq-014304dbab977b79a5f835374e4ea01fa7b0b1a1.tar.xz
T1040RDB/dts: Add UCC hdlc node for QUICC Engine
T1040RDB don't have the UCC uart port, change UCC uart node to UCC hdlc node. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I5608746d9e31f1dd74b5574e6dd4f95963f0f8cb Reviewed-on: http://git.am.freescale.net:8181/10008 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10279
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/t1040rdb.dts15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/t1040rdb.dts b/arch/powerpc/boot/dts/t1040rdb.dts
index 3ad408d..0b0c67a 100644
--- a/arch/powerpc/boot/dts/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/t1040rdb.dts
@@ -362,12 +362,19 @@
fsl,siram-entry-id = <0>;
};
- serial: ucc@2200 {
- device_type = "serial";
- compatible = "ucc_uart";
- port-number = <1>;
+ ucc@2200 {
+ compatible = "fsl,ucc_hdlc";
rx-clock-name = "brg2";
tx-clock-name = "brg2";
+ fsl,rx-sync-clock = "none";
+ fsl,tx-sync-clock = "none";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <1>;
+ fsl,siram-entry-id = <2>;
+ fsl,inter-loopback;
};
};
};