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author | Haiying Wang <Haiying.Wang@freescale.com> | 2013-05-08 19:01:49 (GMT) |
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committer | Fleming Andrew-AFLEMING <AFLEMING@freescale.com> | 2013-05-08 21:41:46 (GMT) |
commit | 3785a09d393c5290bea3a09b1de4867fec7852f8 (patch) | |
tree | 8c9fbcaf09e25e7a83a77960e91af3d8f4e3c58a /arch | |
parent | 1055d73442fc2df29780540a267d9d5917e908ac (diff) | |
download | linux-fsl-qoriq-3785a09d393c5290bea3a09b1de4867fec7852f8.tar.xz |
usdpaa: add b44240qds usdpaa device tree
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: I3dcdc23e350e16eeb0c85647e5b283d773df9cfb
Reviewed-on: http://git.am.freescale.net:8181/2406
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/boot/dts/b4420qds-usdpaa.dts | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/b4420qds-usdpaa.dts b/arch/powerpc/boot/dts/b4420qds-usdpaa.dts new file mode 100644 index 0000000..2884b0c --- /dev/null +++ b/arch/powerpc/boot/dts/b4420qds-usdpaa.dts @@ -0,0 +1,115 @@ +/* + * B4420QDS Device Tree Source + * + * Copyright 2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/include/ "b4420qds.dts" + +/ { + /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding, + * because apps seed these pools with buffers allocated at + * run-time. + * HOWEVER, the kernel driver requires the buffer-size so + * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets + * things if the base-address is zero (hence the 0xdeadbeef + * values). + */ + bp7: buffer-pool@7 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + }; + bp8: buffer-pool@8 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + bp9: buffer-pool@9 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + bp10: buffer-pool@10 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <10>; + fsl,bpool-thresholds = <0x10 0x30 0x0 0x0>; + }; + bp11: buffer-pool@11 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <11>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + bp12: buffer-pool@12 { + compatible = "fsl,b4420-bpool", "fsl,bpool"; + fsl,bpid = <12>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + }; + + fsl,dpaa { + ethernet@0 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>; + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>; + }; + ethernet@1 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>; + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>; + }; + ethernet@2 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + ethernet@3 { + compatible = "fsl,b4420-dpa-ethernet-init", "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; + }; + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x6e 1 0x6f 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; +}; |