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author | Ingo Molnar <mingo@elte.hu> | 2008-12-03 07:25:56 (GMT) |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-12-03 07:25:59 (GMT) |
commit | 6083aa485c86933ee444dc2242270d37ea4664cb (patch) | |
tree | e2b7b9588bbf18a62bf08fcf3fda812de25cda4d /arch | |
parent | dcb7731a185efbf3d800618d874af99895df5afb (diff) | |
parent | 93093d099e5dd0c258fd530c12668e828c20df41 (diff) | |
download | linux-fsl-qoriq-6083aa485c86933ee444dc2242270d37ea4664cb.tar.xz |
Merge branch 'x86/io' into x86/iommu
Merge x86/io into x86/iommu due to a small patch conflict in io.h.
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-pxa/include/mach/pxafb.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/reset.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-pxa/spitz.c | 4 | ||||
-rw-r--r-- | arch/x86/Kconfig | 2 | ||||
-rw-r--r-- | arch/x86/include/asm/io.h | 37 |
5 files changed, 38 insertions, 13 deletions
diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index 8e59111..cbda4d3 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h @@ -33,6 +33,7 @@ #define LCD_CONN_TYPE(_x) ((_x) & 0x0f) #define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) +#define LCD_TYPE_MASK 0xf #define LCD_TYPE_UNKNOWN 0 #define LCD_TYPE_MONO_STN 1 #define LCD_TYPE_MONO_DSTN 2 diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 1b2af57..00b2dc2 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -90,12 +90,13 @@ void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); break; - case 'h': - do_hw_reset(); - break; case 'g': do_gpio_reset(); break; + case 'h': + default: + do_hw_reset(); + break; } } diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index f0a5bba..3be76ee 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -67,6 +67,7 @@ static unsigned long spitz_pin_config[] __initdata = { /* Chip Selects */ GPIO78_nCS_2, /* SCOOP #2 */ + GPIO79_nCS_3, /* NAND */ GPIO80_nCS_4, /* SCOOP #1 */ /* LCD - 16bpp Active TFT */ @@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = { GPIO51_nPIOW, GPIO85_nPCE_1, GPIO54_nPCE_2, - GPIO79_PSKTSEL, GPIO55_nPREG, GPIO56_nPWAIT, GPIO57_nIOIS16, + GPIO104_PSKTSEL, /* MMC */ GPIO32_MMC_CLK, @@ -686,7 +687,6 @@ static void __init akita_init(void) spitz_pcmcia_config.num_devs = 1; platform_scoop_config = &spitz_pcmcia_config; - pxa_set_i2c_info(NULL); i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); common_init(); diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 2187c60..32b9ee2 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -19,6 +19,8 @@ config X86_64 config X86 def_bool y select HAVE_AOUT if X86_32 + select HAVE_READQ + select HAVE_WRITEQ select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h index ac2abc8..33513b9 100644 --- a/arch/x86/include/asm/io.h +++ b/arch/x86/include/asm/io.h @@ -4,6 +4,7 @@ #define ARCH_HAS_IOREMAP_WC #include <linux/compiler.h> +#include <asm-generic/int-ll64.h> #define build_mmio_read(name, size, type, reg, barrier) \ static inline type name(const volatile void __iomem *addr) \ @@ -45,20 +46,40 @@ build_mmio_write(__writel, "l", unsigned int, "r", ) #define mmiowb() barrier() #ifdef CONFIG_X86_64 + build_mmio_read(readq, "q", unsigned long, "=r", :"memory") -build_mmio_read(__readq, "q", unsigned long, "=r", ) build_mmio_write(writeq, "q", unsigned long, "r", :"memory") -build_mmio_write(__writeq, "q", unsigned long, "r", ) -#define readq_relaxed(a) __readq(a) -#define __raw_readq __readq -#define __raw_writeq writeq +#else + +static inline __u64 readq(const volatile void __iomem *addr) +{ + const volatile u32 __iomem *p = addr; + u32 low, high; + + low = readl(p); + high = readl(p + 1); + + return low + ((u64)high << 32); +} + +static inline void writeq(__u64 val, volatile void __iomem *addr) +{ + writel(val, addr); + writel(val >> 32, addr+4); +} -/* Let people know we have them */ -#define readq readq -#define writeq writeq #endif +#define readq_relaxed(a) readq(a) + +#define __raw_readq(a) readq(a) +#define __raw_writeq(val, addr) writeq(val, addr) + +/* Let people know that we have them */ +#define readq readq +#define writeq writeq + extern int iommu_bio_merge; #ifdef CONFIG_X86_32 |