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authorMinghuan Lian <Minghuan.Lian@freescale.com>2013-03-28 05:30:53 (GMT)
committerFleming Andrew-AFLEMING <AFLEMING@freescale.com>2013-04-03 20:58:48 (GMT)
commit6cc05019732c3bfa56acfa67e70075524975316e (patch)
treeffee44f8d35e5f98ec79b5871a6fac996f7d79d8 /arch
parentf545f473055a8bf8472ed10c076d6977a508cce4 (diff)
downloadlinux-fsl-qoriq-6cc05019732c3bfa56acfa67e70075524975316e.tar.xz
powerpc/dts: Add RapidIO device tree for B4860QDS
Change-Id: Ib970be5f9529532d8f6b2fd19092d41d0237ef6a Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/854 Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com> Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/boot/dts/b4860qds.dts11
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-post.dtsi20
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/b4860qds.dts b/arch/powerpc/boot/dts/b4860qds.dts
index d49f901..8da3f9c 100644
--- a/arch/powerpc/boot/dts/b4860qds.dts
+++ b/arch/powerpc/boot/dts/b4860qds.dts
@@ -57,6 +57,17 @@
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
};
+
+ rio: rapidio@ffe0c0000 {
+ reg = <0xf 0xfe0c0000 0 0x11000>;
+
+ port1 {
+ ranges = <0 0 0xc 0x20000000 0 0x10000000>;
+ };
+ port2 {
+ ranges = <0 0 0xc 0x30000000 0 0x10000000>;
+ };
+ };
};
/include/ "fsl/b4860si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
index b63378c..19358ea 100644
--- a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -40,6 +40,26 @@
/include/ "qoriq-qman2-portals.dtsi"
};
+&rio {
+ compatible = "fsl,srio";
+ interrupts = <16 2 1 11>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ port1 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ cell-index = <1>;
+ };
+
+ port2 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ cell-index = <2>;
+ };
+};
+
&soc {
#address-cells = <1>;
#size-cells = <1>;