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| author | Shawn Guo <shawn.guo@linaro.org> | 2013-01-14 13:11:10 (GMT) |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-01-14 14:19:48 (GMT) |
| commit | 83ae20981ae924c37d02a42c829155fc3851260c (patch) | |
| tree | 2ae259f65a6daabc0904e82be7a89f5f17eb9209 /arch | |
| parent | 837576642167d701f983e4def0d3936b514a28ae (diff) | |
| download | linux-fsl-qoriq-83ae20981ae924c37d02a42c829155fc3851260c.tar.xz | |
ARM: imx: correct low-power mode setting
The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode
(WAIT_UNCLOCKED) by default. However this is undesirable because
WAIT mode should only be enabled when there is a driver managing
ARM clock gating. Correct the initial power mode to WAIT_CLOCKED
(disable WAIT mode). While at it, the power mode after resuming
is also set back to WAIT_CLOCKED from STOP_POWER_OFF.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6q.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-imx/pm-imx6q.c | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 7f2c10c..c0c4e72 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -436,6 +436,9 @@ int __init mx6q_clocks_init(void) for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clk[clks_init_on[i]]); + /* Set initial power mode */ + imx6q_set_lpm(WAIT_CLOCKED); + np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); base = of_iomap(np, 0); WARN_ON(!base); diff --git a/arch/arm/mach-imx/pm-imx6q.c b/arch/arm/mach-imx/pm-imx6q.c index a17543d..ee42d20 100644 --- a/arch/arm/mach-imx/pm-imx6q.c +++ b/arch/arm/mach-imx/pm-imx6q.c @@ -41,6 +41,7 @@ static int imx6q_pm_enter(suspend_state_t state) cpu_suspend(0, imx6q_suspend_finish); imx_smp_prepare(); imx_gpc_post_resume(); + imx6q_set_lpm(WAIT_CLOCKED); break; default: return -EINVAL; |