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author | Stefan Pledl <stefan.pledl@mesutronic.de> | 2009-07-11 11:50:42 (GMT) |
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committer | Mike Frysinger <vapier@gentoo.org> | 2009-09-17 01:31:46 (GMT) |
commit | a2f78cfc656e3013e5024460a7b8a0b3dde456d3 (patch) | |
tree | 1e39a3e8492df701e587fdf3aaa53e5f983d0ff4 /arch | |
parent | 837ec2d56c41640d1f1238e52c350b2a516d29ba (diff) | |
download | linux-fsl-qoriq-a2f78cfc656e3013e5024460a7b8a0b3dde456d3.tar.xz |
Blackfin: fix BF548 UART0 DMA IRQ translation
The initial BF54x port included some defines to keep code simple across
different processors, but it just ended up causing the UART0 DMA IRQs to
be set to the UART1 channels.
Signed-off-by: Stefan Pledl <stefan.pledl@mesutronic.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/blackfin/mach-bf548/dma.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/blackfin/mach-bf548/dma.c b/arch/blackfin/mach-bf548/dma.c index 5359806..d9239bc 100644 --- a/arch/blackfin/mach-bf548/dma.c +++ b/arch/blackfin/mach-bf548/dma.c @@ -91,16 +91,16 @@ int channel2irq(unsigned int channel) ret_irq = IRQ_SPI1; break; case CH_UART0_RX: - ret_irq = IRQ_UART_RX; + ret_irq = IRQ_UART0_RX; break; case CH_UART0_TX: - ret_irq = IRQ_UART_TX; + ret_irq = IRQ_UART0_TX; break; case CH_UART1_RX: - ret_irq = IRQ_UART_RX; + ret_irq = IRQ_UART1_RX; break; case CH_UART1_TX: - ret_irq = IRQ_UART_TX; + ret_irq = IRQ_UART1_TX; break; case CH_EPPI0: ret_irq = IRQ_EPPI0; |