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| author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-08-21 00:33:21 (GMT) |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-08-27 01:09:56 (GMT) |
| commit | 40ef723c8bf3c675aa210d98fc411e347911829c (patch) | |
| tree | 56e0835fdc5495c4b975aee02551c11029a694fd /drivers/clk/clk-divider.c | |
| parent | 5cfe9614f365915d9e75d110d4008b06a5c0b99e (diff) | |
| download | linux-fsl-qoriq-40ef723c8bf3c675aa210d98fc411e347911829c.tar.xz | |
clk: samsung: pll: Use new registration method for PLL6552 and PLL6553
This patch modifies PLL6552 and PLL6553 clock drivers to use recently
added common Samsung PLL registration method.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk-divider.c')
0 files changed, 0 insertions, 0 deletions