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authorJingchang Lu <jingchang.lu@freescale.com>2014-06-23 01:50:16 (GMT)
committerMatthew Weigel <Matthew.Weigel@freescale.com>2014-12-11 18:35:31 (GMT)
commit74118aa768ebac34f0c6123eb152fdcd8681bae0 (patch)
treef8843a7856a80e4394f937fe99539d252aa3a0ea /drivers/clk
parent2f3187620e02641ee4f25d51996d77c1ddb09ec1 (diff)
downloadlinux-fsl-qoriq-74118aa768ebac34f0c6123eb152fdcd8681bae0.tar.xz
clk: ppc-corenet: Add CLK_OF_DECLARE support
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/Kconfig2
-rw-r--r--drivers/clk/clk-ppc-corenet.c12
2 files changed, 13 insertions, 1 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 279407a..60c0a01 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -88,7 +88,7 @@ config COMMON_CLK_AXI_CLKGEN
config CLK_PPC_CORENET
bool "Clock driver for PowerPC corenet platforms"
- depends on PPC_E500MC && OF
+ depends on (PPC_E500MC || FSL_SOC) && OF
---help---
This adds the clock driver support for Freescale PowerPC corenet
platforms using common clock framework.
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
index 6f968f1..358dd4a 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -11,6 +11,7 @@
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
+#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/of.h>
#include <linux/slab.h>
@@ -238,6 +239,7 @@ err_clks:
static const struct of_device_id clk_match[] __initconst = {
{ .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+ { .compatible = "fsl,sys-clock", .data = of_fixed_clk_setup, },
{ .compatible = "fsl,core-pll-clock", .data = core_pll_init, },
{ .compatible = "fsl,core-mux-clock", .data = core_mux_init, },
{}
@@ -278,3 +280,13 @@ static int __init ppc_corenet_clk_init(void)
return platform_driver_register(&ppc_corenet_clk_driver);
}
subsys_initcall(ppc_corenet_clk_init);
+
+static void __init ls1021a_clocks_init(struct device_node *np)
+{
+ base = of_iomap(np, 0);
+ if (!base)
+ return;
+
+ of_clk_init(clk_match);
+}
+CLK_OF_DECLARE(ls1021a, "fsl,ls1021a-clockgen", ls1021a_clocks_init);