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authorSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>2013-05-29 09:32:47 (GMT)
committerDavid S. Miller <davem@davemloft.net>2013-05-31 00:54:04 (GMT)
commitcb85215ffc34479188d0ec25a56352f05ad672ce (patch)
tree85fac3e4867bfb2657f0b1c997fd31ec15f298b8 /drivers/cpufreq/ppc_cbe_cpufreq.c
parentcc9d459894b0927d3f9280b07b308cec2576ad80 (diff)
downloadlinux-fsl-qoriq-cb85215ffc34479188d0ec25a56352f05ad672ce.tar.xz
net: mv643xx_eth: proper initialization for Kirkwood SoCs
Ethernet controllers found on Kirkwood SoCs not only suffer from loosing MAC address register contents on clock gating but also some important registers are reset to values that would break ethernet. This patch clears the CLK125_BYPASS_EN bit for DT enabled Kirkwood only by using of_device_is_compatible() instead of #ifdefs. Non-DT Kirkwood is not affected as it installs a clock gating workaround because of the MAC address issue above. Other Orion SoCs do not suffer from register reset, do not have the bit in question, or do not have the register at all. Moreover, system controllers on PPC using this driver should also be protected from clearing that bit. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/cpufreq/ppc_cbe_cpufreq.c')
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