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author | Horia Geantă <horia.geanta@freescale.com> | 2015-10-30 12:30:19 (GMT) |
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committer | Horia Geantă <horia.geanta@freescale.com> | 2015-11-03 07:41:18 (GMT) |
commit | 67ef9d132bb8d6e91863160e56ec62291c8b2be7 (patch) | |
tree | 60115ccddab2f4751f49202af04bacebe8cd2be4 /drivers/crypto/caam/ctrl.c | |
parent | 2c2766622da60bfddb25f67e04bba97e2cb4e97f (diff) | |
download | linux-fsl-qoriq-67ef9d132bb8d6e91863160e56ec62291c8b2be7.tar.xz |
crypto: caam - enable LARGE_BURST for enhancing DMA transactions size
Increasing CAAM DMA engine transaction size either
-reduces the number of required transactions or
-adds the ability to transfer more data with same transaction count
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Diffstat (limited to 'drivers/crypto/caam/ctrl.c')
-rw-r--r-- | drivers/crypto/caam/ctrl.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index 0ced96f..1615916 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -543,7 +543,7 @@ static int caam_probe(struct platform_device *pdev) * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel, * long pointers in master configuration register */ - setbits32(&ctrl->mcr, MCFGR_WDENABLE | + setbits32(&ctrl->mcr, MCFGR_WDENABLE | MCFGR_LARGE_BURST | (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0) | (is_arm ? 0x2 << MCFGR_AWCACHE_SHIFT : 0)); @@ -833,7 +833,7 @@ static int caam_resume(struct device *dev) * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel, * long pointers in master configuration register */ - setbits32(&ctrl->mcr, MCFGR_WDENABLE | + setbits32(&ctrl->mcr, MCFGR_WDENABLE | MCFGR_LARGE_BURST | (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0) | (is_arm ? 0x2 << MCFGR_AWCACHE_SHIFT : 0)); |