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author | Dan Williams <dan.j.williams@intel.com> | 2009-12-19 22:36:02 (GMT) |
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committer | Dan Williams <dan.j.williams@intel.com> | 2009-12-19 22:36:02 (GMT) |
commit | a6d52d70677e99bdb89b6921c265d0a58c22e597 (patch) | |
tree | 9310005efbfa5d3141c1bf9d9ed5464377419f1e /drivers/dma/ioat/registers.h | |
parent | e02a0e47a3f061c1a53fc4376332a988ec047e8a (diff) | |
download | linux-fsl-qoriq-a6d52d70677e99bdb89b6921c265d0a58c22e597.tar.xz |
ioat2,3: put channel hardware in known state at init
Put the ioat2 and ioat3 state machines in the halted state with all
errors cleared.
The ioat1 init path is not disturbed for stability, there are no
reported ioat1 initiaization issues.
Cc: <stable@kernel.org>
Reported-by: Roland Dreier <rdreier@cisco.com>
Tested-by: Roland Dreier <rdreier@cisco.com>
Acked-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/dma/ioat/registers.h')
-rw-r--r-- | drivers/dma/ioat/registers.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/dma/ioat/registers.h b/drivers/dma/ioat/registers.h index f015ec1..e8ae63b 100644 --- a/drivers/dma/ioat/registers.h +++ b/drivers/dma/ioat/registers.h @@ -27,6 +27,7 @@ #define IOAT_PCI_DEVICE_ID_OFFSET 0x02 #define IOAT_PCI_DMAUNCERRSTS_OFFSET 0x148 +#define IOAT_PCI_CHANERR_INT_OFFSET 0x180 #define IOAT_PCI_CHANERRMASK_INT_OFFSET 0x184 /* MMIO Device Registers */ |