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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 21:04:58 (GMT) |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 21:04:58 (GMT) |
| commit | c029e405bd3d4e92d09fbbc97c03952585986ebe (patch) | |
| tree | 8c9b23481a22ca15240e6a4e0df9afc3492efe3f /drivers/edac/amd64_edac.c | |
| parent | a9ccd80aadadef8c424142d41fddea7c0880f0e9 (diff) | |
| parent | 525906bc898d712f21e5bfcfc85ab0e517e3d086 (diff) | |
| download | linux-fsl-qoriq-c029e405bd3d4e92d09fbbc97c03952585986ebe.tar.xz | |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (21 commits)
EDAC, MCE: Fix shift warning on 32-bit
EDAC, MCE: Add a BIT_64() macro
EDAC, MCE: Enable MCE decoding on F12h
EDAC, MCE: Add F12h NB MCE decoder
EDAC, MCE: Add F12h IC MCE decoder
EDAC, MCE: Add F12h DC MCE decoder
EDAC, MCE: Add support for F11h MCEs
EDAC, MCE: Enable MCE decoding on F14h
EDAC, MCE: Fix FR MCEs decoding
EDAC, MCE: Complete NB MCE decoders
EDAC, MCE: Warn about LS MCEs on F14h
EDAC, MCE: Adjust IC decoders to F14h
EDAC, MCE: Adjust DC decoders to F14h
EDAC, MCE: Rename files
EDAC, MCE: Rework MCE injection
EDAC: Export edac sysfs class to users.
EDAC, MCE: Pass complete MCE info to decoders
EDAC, MCE: Sanitize error codes
EDAC, MCE: Remove unused function parameter
EDAC, MCE: Add HW_ERR prefix
...
Diffstat (limited to 'drivers/edac/amd64_edac.c')
| -rw-r--r-- | drivers/edac/amd64_edac.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 09fcc52..8521401 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -2073,11 +2073,18 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci, amd64_handle_ue(mci, info); } -void amd64_decode_bus_error(int node_id, struct err_regs *regs) +void amd64_decode_bus_error(int node_id, struct mce *m, u32 nbcfg) { struct mem_ctl_info *mci = mci_lookup[node_id]; + struct err_regs regs; - __amd64_decode_bus_error(mci, regs); + regs.nbsl = (u32) m->status; + regs.nbsh = (u32)(m->status >> 32); + regs.nbeal = (u32) m->addr; + regs.nbeah = (u32)(m->addr >> 32); + regs.nbcfg = nbcfg; + + __amd64_decode_bus_error(mci, ®s); /* * Check the UE bit of the NB status high register, if set generate some @@ -2086,7 +2093,7 @@ void amd64_decode_bus_error(int node_id, struct err_regs *regs) * * FIXME: this should go somewhere else, if at all. */ - if (regs->nbsh & K8_NBSH_UC_ERR && !report_gart_errors) + if (regs.nbsh & K8_NBSH_UC_ERR && !report_gart_errors) edac_mc_handle_ue_no_info(mci, "UE bit is set"); } |