diff options
| author | Eric Anholt <eric@anholt.net> | 2008-07-29 19:10:39 (GMT) |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2008-10-17 21:10:10 (GMT) |
| commit | ed4cb4142b242d8090d3811d5eb4abf6aa985bc8 (patch) | |
| tree | 5d19db6ffec95b18654bbde820ae8ff8995f856e /drivers/gpu/drm/i915/i915_dma.c | |
| parent | 585fb111348f7cdc30c6a1b903987612ddeafb23 (diff) | |
| download | linux-fsl-qoriq-ed4cb4142b242d8090d3811d5eb4abf6aa985bc8.tar.xz | |
i915: Add support for MSI and interrupt mitigation.
Previous attempts at interrupt mitigation had been foiled by i915_wait_irq's
failure to update the sarea seqno value when the status page indicated that
the seqno had already been passed. MSI support has been seen to cut CPU
costs by up to 40% in some workloads by avoiding other expensive interrupt
handlers for frequent graphics interrupts.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_dma.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 4d56dfd..27a1f78 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -84,7 +84,7 @@ static int i915_dma_cleanup(struct drm_device * dev) * may not have been called from userspace and after dev_private * is freed, it's too late. */ - if (dev->irq) + if (dev->irq_enabled) drm_irq_uninstall(dev); if (dev_priv->ring.virtual_start) { @@ -644,7 +644,7 @@ static int i915_getparam(struct drm_device *dev, void *data, switch (param->param) { case I915_PARAM_IRQ_ACTIVE: - value = dev->irq ? 1 : 0; + value = dev->irq_enabled; break; case I915_PARAM_ALLOW_BATCHBUFFER: value = dev_priv->allow_batchbuffer ? 1 : 0; @@ -763,6 +763,20 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) ret = drm_addmap(dev, base, size, _DRM_REGISTERS, _DRM_KERNEL | _DRM_DRIVER, &dev_priv->mmio_map); + + + /* On the 945G/GM, the chipset reports the MSI capability on the + * integrated graphics even though the support isn't actually there + * according to the published specs. It doesn't appear to function + * correctly in testing on 945G. + * This may be a side effect of MSI having been made available for PEG + * and the registers being closely associated. + */ + if (!IS_I945G(dev) && !IS_I945GM(dev)) + pci_enable_msi(dev->pdev); + + spin_lock_init(&dev_priv->user_irq_lock); + return ret; } @@ -770,6 +784,9 @@ int i915_driver_unload(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + if (dev->pdev->msi_enabled) + pci_disable_msi(dev->pdev); + if (dev_priv->mmio_map) drm_rmmap(dev, dev_priv->mmio_map); |