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| author | Rodrigo Vivi <rodrigo.vivi@gmail.com> | 2013-03-25 20:55:49 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-03-26 08:04:01 (GMT) |
| commit | 92bd1bf089762dfee9fe34437068714a881c8bc0 (patch) | |
| tree | 2af7851320c1c2a2214fc1e4f0a97f677a951e53 /drivers/gpu/drm/i915/i915_gem.c | |
| parent | a42f704b71b252705f34fbe60ea6f4a76f891a78 (diff) | |
| download | linux-fsl-qoriq-92bd1bf089762dfee9fe34437068714a881c8bc0.tar.xz | |
drm/i915: HSW PM Frequency bits fix
According to HSW PM programming guide, frequency bits starts at
24 instead of 25.
v2: Paulo Zanoni noticed that only frequency bits can be set at
GEN6_RPNSWREQ. All others are read only.
CC: Ben Widawsky <ben@bwidawsk.net>
CC: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem.c')
0 files changed, 0 insertions, 0 deletions