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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-07 20:51:02 (GMT) |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-09-07 20:55:52 (GMT) |
| commit | bc41606aefa8b17000619f510d5809e6c4003d65 (patch) | |
| tree | f596640e3f76cb64f2e1aef48d74209c6ca9ea63 /drivers/gpu/drm/i915/intel_display.c | |
| parent | 8554048070906579ec9fa19ac381deddd2d7b155 (diff) | |
| download | linux-fsl-qoriq-bc41606aefa8b17000619f510d5809e6c4003d65.tar.xz | |
Revert "drm/i915: Enable RC6 on Ironlake."
This reverts commit ce17178094f368d9e3f39b2cb4303da5ed633dd4.
This commit has been independently bisected a few times as being the cause
of a s2ram failure.
Reported-and-tested-by: Kyle McMartin <kyle@mcmartin.ca>
Reported-and-tested-by: Andy Isaacson <adi@hexapodia.org>
Cc: Zou Nan hai <nanhai.zou@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 40cc5da..e0d1952 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5696,8 +5696,7 @@ void intel_init_clock_gating(struct drm_device *dev) ILK_DPFC_DIS2 | ILK_CLK_FBC); } - if (IS_GEN6(dev)) - return; + return; } else if (IS_G4X(dev)) { uint32_t dspclk_gate; I915_WRITE(RENCLK_GATE_D1, 0); @@ -5758,11 +5757,9 @@ void intel_init_clock_gating(struct drm_device *dev) OUT_RING(MI_FLUSH); ADVANCE_LP_RING(); } - } else { + } else DRM_DEBUG_KMS("Failed to allocate render context." - "Disable RC6\n"); - return; - } + "Disable RC6\n"); } if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) { |