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| author | Ingo Molnar <mingo@kernel.org> | 2013-08-14 10:14:12 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2013-08-14 10:14:12 (GMT) |
| commit | 397f09977ea350a20f20b415a9313cc790137742 (patch) | |
| tree | 0e44f2f3e5804bd5c0c6f644785006b7225e3c94 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 6356bb0ad6525dae93c06478a098ed3848e9ab01 (diff) | |
| parent | a4b4bedce880046feeb5b206392960f395ed02ad (diff) | |
| download | linux-fsl-qoriq-397f09977ea350a20f20b415a9313cc790137742.tar.xz | |
Merge tag 'amd_f15_m30' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/ras
Pull AMD F15h, model 0x30 and later enablement stuff, more specifically EDAC
support, from Borislav Petkov.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f895d15..b0e4a0b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5063,8 +5063,26 @@ static void __intel_set_power_well(struct drm_device *dev, bool enable) } } else { if (enable_requested) { + unsigned long irqflags; + enum pipe p; + I915_WRITE(HSW_PWR_WELL_DRIVER, 0); + POSTING_READ(HSW_PWR_WELL_DRIVER); DRM_DEBUG_KMS("Requesting to disable the power well\n"); + + /* + * After this, the registers on the pipes that are part + * of the power well will become zero, so we have to + * adjust our counters according to that. + * + * FIXME: Should we do this in general in + * drm_vblank_post_modeset? + */ + spin_lock_irqsave(&dev->vbl_lock, irqflags); + for_each_pipe(p) + if (p != PIPE_A) + dev->last_vblank[p] = 0; + spin_unlock_irqrestore(&dev->vbl_lock, irqflags); } } } |