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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-08-24 08:12:22 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-24 09:07:59 (GMT) |
| commit | 9a0f938bde74bf9e50bd75c8de9e38c1787398cd (patch) | |
| tree | 2e2f245719fbd172d453212f1ebd47d6c6ada1cc /drivers/gpu/drm/i915/intel_sdvo_regs.h | |
| parent | 5ee369138d28c17305e1cdc662a62a2fc83d80d7 (diff) | |
| download | linux-fsl-qoriq-9a0f938bde74bf9e50bd75c8de9e38c1787398cd.tar.xz | |
drm/i915: Use the correct size of the GTT for placing the per-process entries
The current layout is to place the per-process tables at the end of the
GTT. However, this is currently using a hardcoded maximum size for the GTT
and not taking in account limitations imposed by the BIOS. Use the value
for the total number of entries allocated in the table as provided by
the configuration registers.
Reported-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Matthew Garret <mjg@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo_regs.h')
0 files changed, 0 insertions, 0 deletions