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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-08 15:42:52 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-08-08 20:54:06 (GMT) |
| commit | 65bccb5c708bd9f00d24f041f4f7c45130359448 (patch) | |
| tree | e300366449060608476d98f65772a2cb4f91b168 /drivers/gpu/drm/i915 | |
| parent | 2fedbff948cf5bc1e9977b7bc885aae45bd32f74 (diff) | |
| download | linux-fsl-qoriq-65bccb5c708bd9f00d24f041f4f7c45130359448.tar.xz | |
drm/i915: fixup desired rps frequency computation
In commit
commit 20b46e59dd102665ce7168baa215e5b1ee66b69b
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Thu Jul 26 11:16:14 2012 +0200
drm/i915: Only set the down rps limit when at the loweset frequency
The computation for the new desired frequency was extracted, but since
the desired frequency was passed-by value, the adjustments didn't
propgate back. Fix this.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index d0ce894..5050bb8 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2272,13 +2272,13 @@ static void ironlake_disable_drps(struct drm_device *dev) * ourselves, instead of doing a rmw cycle (which might result in us clearing * all limits and the gpu stuck at whatever frequency it is at atm). */ -static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val) +static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 *val) { u32 limits; limits = 0; - if (val >= dev_priv->max_delay) - val = dev_priv->max_delay; + if (*val >= dev_priv->max_delay) + *val = dev_priv->max_delay; limits |= dev_priv->max_delay << 24; /* Only set the down limit when we've reached the lowest level to avoid @@ -2287,8 +2287,8 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val) * the hw runs at the minimal clock before selecting the desired * frequency, if the down threshold expires in that window we will not * receive a down interrupt. */ - if (val <= dev_priv->min_delay) { - val = dev_priv->min_delay; + if (*val <= dev_priv->min_delay) { + *val = dev_priv->min_delay; limits |= dev_priv->min_delay << 16; } @@ -2298,7 +2298,7 @@ static u32 gen6_rps_limits(struct drm_i915_private *dev_priv, u8 val) void gen6_set_rps(struct drm_device *dev, u8 val) { struct drm_i915_private *dev_priv = dev->dev_private; - u32 limits = gen6_rps_limits(dev_priv, val); + u32 limits = gen6_rps_limits(dev_priv, &val); if (val == dev_priv->cur_delay) return; |