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authorBen Skeggs <bskeggs@redhat.com>2013-05-06 05:27:44 (GMT)
committerBen Skeggs <bskeggs@redhat.com>2013-07-01 03:50:36 (GMT)
commit507cd5b553d88216a8d74ac9f2c73caceb3cd236 (patch)
tree6d6f567ac6a542f9434e11ababd549bf9c529123 /drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c
parent99bd5537bd22256866d83033e0aab2586616bcc2 (diff)
downloadlinux-fsl-qoriq-507cd5b553d88216a8d74ac9f2c73caceb3cd236.tar.xz
drm/nve7/gr: update initial register/context values
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c')
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c
index d4e5474..f884ffb 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c
@@ -750,6 +750,7 @@ nve0_grctx_generate_icmd(struct nvc0_graph_priv *priv)
nv_icmd(priv, 0x000842, 0x00400008);
nv_icmd(priv, 0x000843, 0x08000080);
switch (nv_device(priv)->chipset) {
+ case 0xe7:
case 0xe6:
break;
default:
@@ -869,6 +870,7 @@ nve0_grctx_generate_icmd(struct nvc0_graph_priv *priv)
nv_icmd(priv, 0x000814, 0x00000008);
nv_icmd(priv, 0x000957, 0x00000003);
switch (nv_device(priv)->chipset) {
+ case 0xe7:
case 0xe6:
break;
default:
@@ -2178,6 +2180,7 @@ nve0_grctx_generate_902d(struct nvc0_graph_priv *priv)
case 0xe6:
nv_mthd(priv, 0x902d, 0x3410, 0x80002006);
break;
+ case 0xe7:
default:
nv_mthd(priv, 0x902d, 0x3410, 0x00000000);
break;
@@ -2547,6 +2550,7 @@ nve0_graph_generate_tpc(struct nvc0_graph_priv *priv)
nv_wr32(priv, 0x419e94, 0x0);
nv_wr32(priv, 0x419e98, 0x0);
switch (nv_device(priv)->chipset) {
+ case 0xe7:
case 0xe6:
nv_wr32(priv, 0x419eac, 0x1f8f);
break;
@@ -2566,6 +2570,7 @@ nve0_graph_generate_tpc(struct nvc0_graph_priv *priv)
nv_wr32(priv, 0x419f4c, 0x0);
nv_wr32(priv, 0x419f58, 0x0);
switch (nv_device(priv)->chipset) {
+ case 0xe7:
case 0xe6:
nv_wr32(priv, 0x419f70, 0x0);
break;
@@ -2574,6 +2579,7 @@ nve0_graph_generate_tpc(struct nvc0_graph_priv *priv)
}
nv_wr32(priv, 0x419f78, 0xb);
switch (nv_device(priv)->chipset) {
+ case 0xe7:
case 0xe6:
nv_wr32(priv, 0x419f7c, 0x27a);
break;