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author | Ben Skeggs <bskeggs@redhat.com> | 2012-08-04 08:26:50 (GMT) |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2012-10-03 03:12:55 (GMT) |
commit | c4afbe74cebf887d3d8e7a11aa93bebcb6a3e2e1 (patch) | |
tree | db9de5d166733cdba093731ec67b79e7cfe0b489 /drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c | |
parent | f589be88caf32501a734e531180d5df5d6089ef3 (diff) | |
download | linux-fsl-qoriq-c4afbe74cebf887d3d8e7a11aa93bebcb6a3e2e1.tar.xz |
drm/nvc0-/gr: share headers between fermi and kepler graphics code
v2: Ben Skeggs <bskeggs@redhat.com>
- de-inline nv_icmd, triggers some gcc issue causing ctxnv[ce]0.c to
take a *very* *very* long time to build on some configs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c | 21 |
1 files changed, 3 insertions, 18 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c index f03c667..47bea8a 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve0.c @@ -25,15 +25,7 @@ #include "drmP.h" #include "nouveau_drv.h" #include <core/mm.h> -#include "nve0.h" - -static void -nv_icmd(struct drm_device *priv, u32 icmd, u32 data) -{ - nv_wr32(priv, 0x400204, data); - nv_wr32(priv, 0x400200, icmd); - while (nv_rd32(priv, 0x400700) & 0x00000002) {} -} +#include "nvc0.h" static void nve0_grctx_generate_icmd(struct drm_device *priv) @@ -924,13 +916,6 @@ nve0_grctx_generate_icmd(struct drm_device *priv) } static void -nv_mthd(struct drm_device *priv, u32 class, u32 mthd, u32 data) -{ - nv_wr32(priv, 0x40448c, data); - nv_wr32(priv, 0x404488, 0x80000000 | (mthd << 14) | class); -} - -static void nve0_grctx_generate_a097(struct drm_device *priv) { nv_mthd(priv, 0xa097, 0x0800, 0x00000000); @@ -2621,8 +2606,8 @@ nve0_graph_generate_tpcunk(struct drm_device *priv) int nve0_grctx_generate(struct nouveau_channel *chan) { - struct nve0_graph_priv *oprv = nv_engine(chan->dev, NVOBJ_ENGINE_GR); - struct nve0_graph_chan *grch = chan->engctx[NVOBJ_ENGINE_GR]; + struct nvc0_graph_priv *oprv = nv_engine(chan->dev, NVOBJ_ENGINE_GR); + struct nvc0_graph_chan *grch = chan->engctx[NVOBJ_ENGINE_GR]; struct drm_device *priv = chan->dev; u32 data[6] = {}, data2[2] = {}, tmp; u32 tpc_set = 0, tpc_mask = 0; |