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authorChris Wilson <chris@chris-wilson.co.uk>2011-12-14 12:57:08 (GMT)
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-01-29 17:23:37 (GMT)
commit1690e1eb7a9021826853e181baa48dd77090da28 (patch)
tree397210ab6f278ca81b8108320768b39465db6d08 /drivers/gpu/drm/nouveau/nouveau_i2c.h
parent6a233c78878d8795517d716544d045d5675b3061 (diff)
downloadlinux-fsl-qoriq-1690e1eb7a9021826853e181baa48dd77090da28.tar.xz
drm/i915: Separate fence pin counting from normal bind pin counting
In order to correctly account for reserving space in the GTT and fences for a batch buffer, we need to independently track whether the fence is pinned due to a fenced GPU access in the batch or whether the buffer is pinned in the aperture. Currently we count the fenced as pinned if the buffer has already been seen in the execbuffer. This leads to a false accounting of available fence registers, causing frequent mass evictions. Worse, if coupled with the change to make i915_gem_object_get_fence() report EDADLK upon fence starvation, the batchbuffer can fail with only one fence required... Fixes intel-gpu-tools/tests/gem_fenced_exec_thrash Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38735 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Tested-by: Paul Neumann <paul104x@yahoo.de> [danvet: Resolve the functional conflict with Jesse Barnes sprite patches, acked by Chris Wilson on irc.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_i2c.h')
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