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authorBen Skeggs <bskeggs@redhat.com>2011-09-16 16:11:39 (GMT)
committerBen Skeggs <bskeggs@redhat.com>2011-12-21 09:01:13 (GMT)
commit693461801464eb65eb779261b3d9d80dc9131f81 (patch)
treee5da9ddcfc093b4dbeb07cbc47b9faffc913c23e /drivers/gpu/drm/nouveau/nouveau_state.c
parent5a4267ab14b392bdf43893c6175b045b5f85d53d (diff)
downloadlinux-fsl-qoriq-693461801464eb65eb779261b3d9d80dc9131f81.tar.xz
drm/nv40/pm: convert to new pwm hooks, also fixing pwm type detection
A NV49 appeared a while back that was using the "nv41 style" pwm registers, rather than the "nv40 style" ones my board is using. This disproves the previous theory that the pwm controller choice is chipset-specific. So, after looking at a bunch of vbios images it appears that the next viable theory is that we should select the pwm controller to use based on the gpio line the fan is tied to, just like we do on nv50. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_state.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c18
1 files changed, 2 insertions, 16 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index 2028a39..3d5cf6b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -292,22 +292,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->pm.voltage_get = nouveau_voltage_gpio_get;
engine->pm.voltage_set = nouveau_voltage_gpio_set;
engine->pm.temp_get = nv40_temp_get;
- switch (dev_priv->chipset) {
- case 0x40:
- case 0x49:
- engine->pm.fanspeed_get = nv40_pm_fanspeed_get;
- engine->pm.fanspeed_set = nv40_pm_fanspeed_set;
- break;
- case 0x42:
- case 0x43:
- case 0x47:
- case 0x4b:
- engine->pm.fanspeed_get = nv41_pm_fanspeed_get;
- engine->pm.fanspeed_set = nv41_pm_fanspeed_set;
- break;
- default:
- break;
- }
+ engine->pm.pwm_get = nv40_pm_pwm_get;
+ engine->pm.pwm_set = nv40_pm_pwm_set;
engine->vram.init = nouveau_mem_detect;
engine->vram.takedown = nouveau_stub_takedown;
engine->vram.flags_valid = nouveau_mem_flags_valid;