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author | Emil Velikov <emil.l.velikov@gmail.com> | 2011-04-11 19:43:23 (GMT) |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-16 00:49:41 (GMT) |
commit | 619d4f7e219f4e65137b66ac878cd1eba8e51e10 (patch) | |
tree | d680ef3bf6e6737834a5aead7ad0e2fb02048c60 /drivers/gpu/drm/nouveau | |
parent | 1f962797fb1343f02cbacb94d80c4560d47b67a9 (diff) | |
download | linux-fsl-qoriq-619d4f7e219f4e65137b66ac878cd1eba8e51e10.tar.xz |
drm/nv50: improve nv50_pm_get_clock()
Many of the nv50 cards have their shader and/or memory pll
disabled at some stage.
This patch addresses those cases, so that the function
returns the correct frequency.
When the shader pll is disabled, the blob reports 2*core clock
Whereas for memory, the data stored in the vbios. This action
is incorrect as some vbioses store a clock value that is less
than the refference clock of the pll.
Thus we are reporting the reff_clk as it is the frequency the
pll actually operates
v2 - Convert NV_INFO() messages to NV_DEBUG()
Provide more information in the actuall message
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_pm.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_pm.c b/drivers/gpu/drm/nouveau/nv50_pm.c index 7dbb305..8a28100 100644 --- a/drivers/gpu/drm/nouveau/nv50_pm.c +++ b/drivers/gpu/drm/nouveau/nv50_pm.c @@ -47,6 +47,21 @@ nv50_pm_clock_get(struct drm_device *dev, u32 id) reg0 = nv_rd32(dev, pll.reg + 0); reg1 = nv_rd32(dev, pll.reg + 4); + + if ((reg0 & 0x80000000) == 0) { + if (id == PLL_SHADER) { + NV_DEBUG(dev, "Shader PLL is disabled. " + "Shader clock is twice the core\n"); + ret = nv50_pm_clock_get(dev, PLL_CORE); + if (ret > 0) + return ret << 1; + } else if (id == PLL_MEMORY) { + NV_DEBUG(dev, "Memory PLL is disabled. " + "Memory clock is equal to the ref_clk\n"); + return pll.refclk; + } + } + P = (reg0 & 0x00070000) >> 16; N = (reg1 & 0x0000ff00) >> 8; M = (reg1 & 0x000000ff); |