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| author | Takashi Iwai <tiwai@suse.de> | 2012-09-05 07:17:31 (GMT) |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2012-09-05 07:17:31 (GMT) |
| commit | 14e42917216ab0859827c2d8024df45a917301b4 (patch) | |
| tree | efbea5d1c54387d62a6fd66a21560232cf312fda /drivers/gpu/drm/radeon/radeon_cursor.c | |
| parent | 292f2b6254c9dbb98def6d3521b07a837545ead0 (diff) | |
| parent | 4266274836e81575ee82498d84f4bd08ab7a7378 (diff) | |
| download | linux-fsl-qoriq-14e42917216ab0859827c2d8024df45a917301b4.tar.xz | |
Merge branch 'fixes' of git://git.alsa-project.org/alsa-kernel into for-next
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_cursor.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_cursor.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c index 711e95a..8794744 100644 --- a/drivers/gpu/drm/radeon/radeon_cursor.c +++ b/drivers/gpu/drm/radeon/radeon_cursor.c @@ -67,7 +67,8 @@ static void radeon_hide_cursor(struct drm_crtc *crtc) if (ASIC_IS_DCE4(rdev)) { WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset); - WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT)); + WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT) | + EVERGREEN_CURSOR_URGENT_CONTROL(EVERGREEN_CURSOR_URGENT_1_2)); } else if (ASIC_IS_AVIVO(rdev)) { WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); WREG32(RADEON_MM_DATA, (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT)); @@ -94,7 +95,8 @@ static void radeon_show_cursor(struct drm_crtc *crtc) if (ASIC_IS_DCE4(rdev)) { WREG32(RADEON_MM_INDEX, EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset); WREG32(RADEON_MM_DATA, EVERGREEN_CURSOR_EN | - EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT)); + EVERGREEN_CURSOR_MODE(EVERGREEN_CURSOR_24_8_PRE_MULT) | + EVERGREEN_CURSOR_URGENT_CONTROL(EVERGREEN_CURSOR_URGENT_1_2)); } else if (ASIC_IS_AVIVO(rdev)) { WREG32(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset); WREG32(RADEON_MM_DATA, AVIVO_D1CURSOR_EN | |