diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-05-12 03:02:14 (GMT) |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-05-26 21:14:52 (GMT) |
| commit | 467b200da78c56036e58850a7f27902937d506f7 (patch) | |
| tree | 91be91afd6df4c96a901c1a2575df376ec2bcc5d /drivers/gpu | |
| parent | 778c35444f7bbb8f1816d40ada650e19c5da9c02 (diff) | |
| download | linux-fsl-qoriq-467b200da78c56036e58850a7f27902937d506f7.tar.xz | |
drm/i915: Fix HDMI mode select for Cougarpoint PCH
For real HDMI sink, CPT HDMI port has to set 'HDMI' mode flag
in order to make HDMI audio work correctly.
This is required patch for drm/i915 to enable HDMI audio on CPT PCH,
ALSA patch is at http://mailman.alsa-project.org/pipermail/alsa-devel/2010-May/027601.html
Tested-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 5 |
2 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index df7224d..881fbe9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2744,6 +2744,9 @@ #define SDVO_ENCODING (0) #define TMDS_ENCODING (2 << 10) #define NULL_PACKET_VSYNC_ENABLE (1 << 9) +/* CPT */ +#define HDMI_MODE_SELECT (1 << 9) +#define DVI_MODE_SELECT (0) #define SDVOB_BORDER_ENABLE (1 << 7) #define AUDIO_ENABLE (1 << 6) #define VSYNC_ACTIVE_HIGH (1 << 4) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 65727f0..83bd764 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -59,8 +59,11 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH; - if (hdmi_priv->has_hdmi_sink) + if (hdmi_priv->has_hdmi_sink) { sdvox |= SDVO_AUDIO_ENABLE; + if (HAS_PCH_CPT(dev)) + sdvox |= HDMI_MODE_SELECT; + } if (intel_crtc->pipe == 1) { if (HAS_PCH_CPT(dev)) |