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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-06-29 18:39:32 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-07-05 07:58:10 (GMT) |
| commit | 4c3c115a1eaea5c699caa49e824df6e5b48396a4 (patch) | |
| tree | 5194c09410df064176cf0dfe32107a1dd42a0bbd /drivers/gpu | |
| parent | 4c243e25739252ce08718f519a2d567fd1d91ff0 (diff) | |
| download | linux-fsl-qoriq-4c3c115a1eaea5c699caa49e824df6e5b48396a4.tar.xz | |
drm/i915: fix PIPE_DDI_PORT_MASK
Only bits 30:28, bit 31 is PIPE_DDI_FUNC_ENABLE.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 4ddc62e..1bd17e7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4283,7 +4283,7 @@ PIPE_DDI_FUNC_CTL_B) #define PIPE_DDI_FUNC_ENABLE (1<<31) /* Those bits are ignored by pipe EDP since it can only connect to DDI A */ -#define PIPE_DDI_PORT_MASK (0xf<<28) +#define PIPE_DDI_PORT_MASK (7<<28) #define PIPE_DDI_SELECT_PORT(x) ((x)<<28) #define PIPE_DDI_MODE_SELECT_HDMI (0<<24) #define PIPE_DDI_MODE_SELECT_DVI (1<<24) |