diff options
| author | Heiko Stübner <heiko@sntech.de> | 2013-03-21 04:10:13 (GMT) |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2013-03-24 09:30:57 (GMT) |
| commit | 7a6674dabfe240cc7015fc201f9662d0640e8081 (patch) | |
| tree | d06fe0da0f4b85ba1aeddd02c7a157728e475035 /drivers/i2c/busses/i2c-s3c2410.c | |
| parent | e636602ac2613da8c1777cb42443223994be4107 (diff) | |
| download | linux-fsl-qoriq-7a6674dabfe240cc7015fc201f9662d0640e8081.tar.xz | |
i2c: s3c2410: fixup the styling of the newly moved register definitions
Make them conform more to established standards.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c/busses/i2c-s3c2410.c')
| -rw-r--r-- | drivers/i2c/busses/i2c-s3c2410.c | 52 |
1 files changed, 25 insertions, 27 deletions
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 216fea1..0a81f1f 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c @@ -46,35 +46,33 @@ /* see s3c2410x user guide, v1.1, section 9 (p447) for more info */ -#define S3C2410_IICREG(x) (x) - -#define S3C2410_IICCON S3C2410_IICREG(0x00) -#define S3C2410_IICSTAT S3C2410_IICREG(0x04) -#define S3C2410_IICADD S3C2410_IICREG(0x08) -#define S3C2410_IICDS S3C2410_IICREG(0x0C) -#define S3C2440_IICLC S3C2410_IICREG(0x10) - -#define S3C2410_IICCON_ACKEN (1<<7) -#define S3C2410_IICCON_TXDIV_16 (0<<6) -#define S3C2410_IICCON_TXDIV_512 (1<<6) -#define S3C2410_IICCON_IRQEN (1<<5) -#define S3C2410_IICCON_IRQPEND (1<<4) -#define S3C2410_IICCON_SCALE(x) ((x)&15) +#define S3C2410_IICCON 0x00 +#define S3C2410_IICSTAT 0x04 +#define S3C2410_IICADD 0x08 +#define S3C2410_IICDS 0x0C +#define S3C2440_IICLC 0x10 + +#define S3C2410_IICCON_ACKEN (1 << 7) +#define S3C2410_IICCON_TXDIV_16 (0 << 6) +#define S3C2410_IICCON_TXDIV_512 (1 << 6) +#define S3C2410_IICCON_IRQEN (1 << 5) +#define S3C2410_IICCON_IRQPEND (1 << 4) +#define S3C2410_IICCON_SCALE(x) ((x) & 0xf) #define S3C2410_IICCON_SCALEMASK (0xf) -#define S3C2410_IICSTAT_MASTER_RX (2<<6) -#define S3C2410_IICSTAT_MASTER_TX (3<<6) -#define S3C2410_IICSTAT_SLAVE_RX (0<<6) -#define S3C2410_IICSTAT_SLAVE_TX (1<<6) -#define S3C2410_IICSTAT_MODEMASK (3<<6) +#define S3C2410_IICSTAT_MASTER_RX (2 << 6) +#define S3C2410_IICSTAT_MASTER_TX (3 << 6) +#define S3C2410_IICSTAT_SLAVE_RX (0 << 6) +#define S3C2410_IICSTAT_SLAVE_TX (1 << 6) +#define S3C2410_IICSTAT_MODEMASK (3 << 6) -#define S3C2410_IICSTAT_START (1<<5) -#define S3C2410_IICSTAT_BUSBUSY (1<<5) -#define S3C2410_IICSTAT_TXRXEN (1<<4) -#define S3C2410_IICSTAT_ARBITR (1<<3) -#define S3C2410_IICSTAT_ASSLAVE (1<<2) -#define S3C2410_IICSTAT_ADDR0 (1<<1) -#define S3C2410_IICSTAT_LASTBIT (1<<0) +#define S3C2410_IICSTAT_START (1 << 5) +#define S3C2410_IICSTAT_BUSBUSY (1 << 5) +#define S3C2410_IICSTAT_TXRXEN (1 << 4) +#define S3C2410_IICSTAT_ARBITR (1 << 3) +#define S3C2410_IICSTAT_ASSLAVE (1 << 2) +#define S3C2410_IICSTAT_ADDR0 (1 << 1) +#define S3C2410_IICSTAT_LASTBIT (1 << 0) #define S3C2410_IICLC_SDA_DELAY0 (0 << 0) #define S3C2410_IICLC_SDA_DELAY5 (1 << 0) @@ -82,7 +80,7 @@ #define S3C2410_IICLC_SDA_DELAY15 (3 << 0) #define S3C2410_IICLC_SDA_DELAY_MASK (3 << 0) -#define S3C2410_IICLC_FILTER_ON (1<<2) +#define S3C2410_IICLC_FILTER_ON (1 << 2) /* Treat S3C2410 as baseline hardware, anything else is supported via quirks */ #define QUIRK_S3C2440 (1 << 0) |