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author | Jay Cheng <jacheng@nvidia.com> | 2011-04-25 21:32:27 (GMT) |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2011-05-11 05:45:50 (GMT) |
commit | 40abcf772357355a04f966416eebc943fd0281d4 (patch) | |
tree | 1388653b71196c3523d16b4be4bf1553545e2cd4 /drivers/i2c/busses/i2c-tegra.c | |
parent | 2078cf3b2230cc2ee456e67d28dd9a869097e1ff (diff) | |
download | linux-fsl-qoriq-40abcf772357355a04f966416eebc943fd0281d4.tar.xz |
i2c: tegra: Add de-bounce cycles.
This enables debouncing of the I2C lines. The debounce period is
2 * the debounce register field value, in terms of the I2C block's main
clock. The Tegra TRM indicates that a setting yielding >50nS is
desirable. Hence, a setting of 2 => 4 clocks @ 72MHz => ~55nS.
Signed-off-by: Ken Radtke <kradtke@nvidia.com>
[swarren: Added commit description body,
Fixed 80-column limit, Reverted file permission change]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-tegra.c')
-rw-r--r-- | drivers/i2c/busses/i2c-tegra.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 6b69b70..4d93196 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -35,6 +35,7 @@ #define BYTES_PER_FIFO_WORD 4 #define I2C_CNFG 0x000 +#define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12 #define I2C_CNFG_PACKET_MODE_EN (1<<10) #define I2C_CNFG_NEW_MASTER_FSM (1<<11) #define I2C_STATUS 0x01C @@ -328,7 +329,8 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) if (i2c_dev->is_dvc) tegra_dvc_init(i2c_dev); - val = I2C_CNFG_NEW_MASTER_FSM | I2C_CNFG_PACKET_MODE_EN; + val = I2C_CNFG_NEW_MASTER_FSM | I2C_CNFG_PACKET_MODE_EN | + (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT); i2c_writel(i2c_dev, val, I2C_CNFG); i2c_writel(i2c_dev, 0, I2C_INT_MASK); clk_set_rate(i2c_dev->clk, i2c_dev->bus_clk_rate * 8); |