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| author | Matthieu CASTET <matthieu.castet@parrot.com> | 2014-02-19 05:46:31 (GMT) |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2014-03-05 16:13:48 (GMT) |
| commit | 2e7a84eab131472ea8f413428a9bdedd54a143b5 (patch) | |
| tree | 36015492b7e1ea939c7b3a61d71451bc4d9a36cc /drivers/infiniband | |
| parent | a2879c1d14a1bd066b2597d778fb9d89d05bdab0 (diff) | |
| download | linux-fsl-qoriq-2e7a84eab131472ea8f413428a9bdedd54a143b5.tar.xz | |
usb: chipidea: need to mask when writting endptflush and endptprime
commit 5bf5dbeda2454296f1984adfbfc8e6f5965ac389 upstream.
ENDPTFLUSH and ENDPTPRIME registers are set by software and clear
by hardware. There is a bit for each endpoint. When we are setting
a bit for an endpoint we should make sure we do not touch other
endpoint bit. There is a race condition if the hardware clear the
bit between the read and the write in hw_write.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Tested-by: Michael Grzeschik <mgrzeschik@pengutronix.de>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'drivers/infiniband')
0 files changed, 0 insertions, 0 deletions