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| author | Scott Wood <scottwood@freescale.com> | 2014-04-16 22:28:14 (GMT) |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2014-04-18 19:27:10 (GMT) |
| commit | 2d0e63bea0f31e55de6a70bf6d00c597a5d8820b (patch) | |
| tree | 404fe843af25d56311387f4c9c8aaaf150bb2ca6 /drivers/iommu | |
| parent | 96357638ce888b4a4c52622463370507eb54a904 (diff) | |
| download | linux-fsl-qoriq-2d0e63bea0f31e55de6a70bf6d00c597a5d8820b.tar.xz | |
iommu/fsl: Work around erratum A-007907
Erratum A-007907 can cause a core hang under certain circumstances.
Part of the workaround involves not stashing to L1 Cache. On affected
chips, stash to L2 when L1 is requested.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Change-Id: Ie8b16bf84831aae2b97897e4da91f91e8bdd9868
Reviewed-on: http://git.am.freescale.net:8181/11208
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/fsl_pamu.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c index e7b3d45..70130e1 100644 --- a/drivers/iommu/fsl_pamu.c +++ b/drivers/iommu/fsl_pamu.c @@ -33,6 +33,7 @@ #include <asm/bitops.h> #include <asm/fsl_guts.h> #include <asm/fsl_kibo.h> +#include <asm/mpc85xx.h> #include "fsl_pamu.h" @@ -635,6 +636,26 @@ static u32 get_dsp_l2_stash_id(u32 vcpu) return ~(u32)0; } +static bool has_erratum_a007907(void) +{ + u32 svr = mfspr(SPRN_SVR); + + switch (SVR_SOC_VER(svr)) { + case SVR_B4860: + case SVR_B4420: + case SVR_T4240: + case SVR_T4160: + return SVR_REV(svr) <= 0x20; + + case SVR_T2080: + case SVR_T2081: + return SVR_REV(svr) == 0x10; + + default: + return false; + }; +} + /** * get_stash_id - Returns stash destination id corresponding to a * cache type and vcpu. @@ -652,6 +673,10 @@ u32 get_stash_id(u32 stash_dest_hint, u32 vcpu) int len, found = 0; int i; + if (stash_dest_hint == PAMU_ATTR_CACHE_L1 && + has_erratum_a007907()) + stash_dest_hint = PAMU_ATTR_CACHE_L2; + /* check for DSP L2 cache */ if (stash_dest_hint == PAMU_ATTR_CACHE_DSP_L2) { return get_dsp_l2_stash_id(vcpu); |