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| author | Scott Wood <scottwood@freescale.com> | 2013-10-29 19:50:27 (GMT) |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2013-10-29 19:50:37 (GMT) |
| commit | d0ebef8230e267ec47d4d4a65fe3262e2ebb8026 (patch) | |
| tree | 24b8bb342576f543dac42d59821c4feb7ce07453 /drivers/iommu | |
| parent | 041f2bc64a985b30328de4cb596f04fd913a85de (diff) | |
| download | linux-fsl-qoriq-d0ebef8230e267ec47d4d4a65fe3262e2ebb8026.tar.xz | |
Revert to v3.8 (no RT, no stable)
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/amd_iommu.c | 25 | ||||
| -rw-r--r-- | drivers/iommu/amd_iommu_init.c | 10 | ||||
| -rw-r--r-- | drivers/iommu/intel-iommu.c | 8 |
3 files changed, 18 insertions, 25 deletions
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 4c867f4..c1c74e0 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -2466,16 +2466,18 @@ static int device_change_notifier(struct notifier_block *nb, /* allocate a protection domain if a device is added */ dma_domain = find_protection_domain(devid); - if (!dma_domain) { - dma_domain = dma_ops_domain_alloc(); - if (!dma_domain) - goto out; - dma_domain->target_dev = devid; - - spin_lock_irqsave(&iommu_pd_list_lock, flags); - list_add_tail(&dma_domain->list, &iommu_pd_list); - spin_unlock_irqrestore(&iommu_pd_list_lock, flags); - } + if (dma_domain) + goto out; + dma_domain = dma_ops_domain_alloc(); + if (!dma_domain) + goto out; + dma_domain->target_dev = devid; + + spin_lock_irqsave(&iommu_pd_list_lock, flags); + list_add_tail(&dma_domain->list, &iommu_pd_list); + spin_unlock_irqrestore(&iommu_pd_list_lock, flags); + + dev_data = get_dev_data(dev); dev->archdata.dma_ops = &amd_iommu_dma_ops; @@ -3948,9 +3950,6 @@ static struct irq_remap_table *get_irq_table(u16 devid, bool ioapic) if (!table) goto out; - /* Initialize table spin-lock */ - spin_lock_init(&table->lock); - if (ioapic) /* Keep the first 32 indexes free for IOAPIC interrupts */ table->min_index = 32; diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index b6ecddb..faf10ba 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -1876,6 +1876,11 @@ static int amd_iommu_init_dma(void) struct amd_iommu *iommu; int ret; + init_device_table_dma(); + + for_each_iommu(iommu) + iommu_flush_all_caches(iommu); + if (iommu_pass_through) ret = amd_iommu_init_passthrough(); else @@ -1884,11 +1889,6 @@ static int amd_iommu_init_dma(void) if (ret) return ret; - init_device_table_dma(); - - for_each_iommu(iommu) - iommu_flush_all_caches(iommu); - amd_iommu_init_api(); amd_iommu_init_notifier(); diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index f1e7b86..eca2801 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -4253,19 +4253,13 @@ static void quirk_iommu_rwbf(struct pci_dev *dev) { /* * Mobile 4 Series Chipset neglects to set RWBF capability, - * but needs it. Same seems to hold for the desktop versions. + * but needs it: */ printk(KERN_INFO "DMAR: Forcing write-buffer flush capability\n"); rwbf_quirk = 1; } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_rwbf); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_rwbf); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e20, quirk_iommu_rwbf); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e30, quirk_iommu_rwbf); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e40, quirk_iommu_rwbf); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e90, quirk_iommu_rwbf); #define GGC 0x52 #define GGC_MEMORY_SIZE_MASK (0xf << 8) |