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authorArtem Bityutskiy <artem.bityutskiy@linux.intel.com>2013-03-04 12:21:34 (GMT)
committerDavid Woodhouse <David.Woodhouse@intel.com>2013-04-05 11:00:50 (GMT)
commit14c6578683367b1e7af0c3c09e872b45a45183a7 (patch)
tree8035d78cea0c4d1849134eaf113d29bef6286f28 /drivers/mtd/nand/nand_ids.c
parent02f57fe448618722ed713fe1002894ead9981310 (diff)
downloadlinux-fsl-qoriq-14c6578683367b1e7af0c3c09e872b45a45183a7.tar.xz
mtd: nand: remove AG-AND support
We have only one AG-AND driver and it was not touched since 2005. It looks like AG-AND was not really make it to mass-production and can be considered a dead technology. Along with the AG-AND support, this patch removes the BBT_AUTO_REFRESH feature, because the only user of this feature is AG-AND. And even though it is implemented as a generic feature, I prefer to remove it because NAND flashes do not really need it in this form. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/nand_ids.c')
-rw-r--r--drivers/mtd/nand/nand_ids.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 818bb9e..a907e47 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -134,19 +134,6 @@ struct nand_flash_dev nand_flash_ids[] = {
{"NAND 64GiB 1,8V 16-bit", 0x2E, 0, 65536, 0, LP_OPTIONS16},
{"NAND 64GiB 3,3V 16-bit", 0x4E, 0, 65536, 0, LP_OPTIONS16},
- /*
- * Renesas AND 1 Gigabit. Those chips do not support extended id and
- * have a strange page/block layout ! The chosen minimum erasesize is
- * 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page
- * planes 1 block = 2 pages, but due to plane arrangement the blocks
- * 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7 Anyway JFFS2 would
- * increase the eraseblock size so we chose a combined one which can be
- * erased in one go There are more speed improvements for reads and
- * writes possible, but not implemented now
- */
- {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000,
- NAND_IS_AND | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
-
{NULL,}
};