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author | Arnd Bergmann <arnd@arndb.de> | 2011-10-20 12:59:19 (GMT) |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-20 12:59:19 (GMT) |
commit | 2f540738f8d228016c6cd0d3b303896c174ecee3 (patch) | |
tree | 7e6574c041ac4386763f94d3d401d70f4ab6f55b /drivers/net/bnx2x/bnx2x_reg.h | |
parent | a3849a4c038a21075a0bc7eaf37f65a93976d10c (diff) | |
parent | d8e9c00e38f6947cef7f5466a0a3d369461ab97f (diff) | |
download | linux-fsl-qoriq-2f540738f8d228016c6cd0d3b303896c174ecee3.tar.xz |
Merge branch 'tegra/cleanup' into next/cleanup
Diffstat (limited to 'drivers/net/bnx2x/bnx2x_reg.h')
-rw-r--r-- | drivers/net/bnx2x/bnx2x_reg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h index 750e844..fc7bd0f 100644 --- a/drivers/net/bnx2x/bnx2x_reg.h +++ b/drivers/net/bnx2x/bnx2x_reg.h @@ -1384,6 +1384,18 @@ Latched ump_tx_parity; [31] MCP Latched scpad_parity; */ #define MISC_REG_AEU_ENABLE4_PXP_0 0xa108 #define MISC_REG_AEU_ENABLE4_PXP_1 0xa1a8 +/* [RW 32] fifth 32b for enabling the output for function 0 output0. Mapped + * as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ +#define MISC_REG_AEU_ENABLE5_FUNC_0_OUT_0 0xa688 +/* [RW 32] Fifth 32b for enabling the output for function 1 output0. Mapped + * as follows: [0] PGLUE config_space; [1] PGLUE misc_flr; [2] PGLUE B RBC + * attention [3] PGLUE B RBC parity; [4] ATC attention; [5] ATC parity; [6] + * mstat0 attention; [7] mstat0 parity; [8] mstat1 attention; [9] mstat1 + * parity; [31-10] Reserved; */ +#define MISC_REG_AEU_ENABLE5_FUNC_1_OUT_0 0xa6b0 /* [RW 1] set/clr general attention 0; this will set/clr bit 94 in the aeu 128 bit vector */ #define MISC_REG_AEU_GENERAL_ATTN_0 0xa000 |